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* usrp-n210: use cpu rst on the wb+icap, uploaded latest bootloader rmiJosh Blum2011-01-092-169/+172
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* packet_router: tweak mode SR (its only 1 bit)Josh Blum2011-01-071-3/+2
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* Merge branch 'cordic_policy' into nextJosh Blum2011-01-045-49/+83
|\ | | | | | | | | | | Conflicts: usrp2/top/u2_rev3/u2_core.v usrp2/top/u2plus/u2plus_core.v
| * hook up sampled pps in u2plus, remove unused priority encoder, minor cleanupsMatt Ettus2010-12-302-26/+18
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| * processor can read back vita_time at last ppsMatt Ettus2010-12-302-11/+11
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| * run should actually turn on now any time in the IBS_RUN stateMatt Ettus2010-12-291-11/+8
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| * gyrations to get it to meet timingMatt Ettus2010-12-291-13/+23
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| * should keep cordic spinning and the rest of the tx going throughMatt Ettus2010-12-281-4/+33
| | | | | | | | underruns. There is a timeout so it won't go forever.
* | usrp-n210: checked in updated bootloader (from next with fixes)Josh Blum2010-12-311-36/+36
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* | usrp2: removed unused changed signal for mode selectionJosh Blum2010-12-291-2/+1
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* | packet_router: replace buffers interfaced in packet router with buffer_int2Josh Blum2010-12-283-163/+25
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* | now uses 2 rams, one for read, one for writeMatt Ettus2010-12-281-89/+97
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* | reformattingMatt Ettus2010-12-281-5/+1
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* | first cut at new buffer interface for CPU. Like old buffer_int plusMatt Ettus2010-12-281-0/+169
| | | | | | | | a single buffer.
* | unused lineMatt Ettus2010-12-281-1/+0
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* | packet_router: use the mode register to reset hs control and cpu smsJosh Blum2010-12-271-22/+13
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* | Merge branch 'udp_ports' into nextJosh Blum2010-12-226-37/+66
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| * | udp_ports: fixed address comparison B+14 is comparisonJosh Blum2010-12-211-1/+1
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| * | don't overwrite checksum valuesMatt Ettus2010-12-211-7/+8
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| * | udp_ports: set the source port and destination port from tableJosh Blum2010-12-171-12/+16
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| * | generate port number headers in the dsp error unitsMatt Ettus2010-12-154-8/+12
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| * | now supports up to 4 different udp portsMatt Ettus2010-12-152-23/+43
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* | usrp-n210: add missing wires, incr compat, use boot ram as stack spaceJosh Blum2010-12-221-16/+14
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* | usrp-n210: delay reset for boot loader stack pointer to init, copied bl.rmi ↵Josh Blum2010-12-182-187/+173
| | | | | | | | without debug
* | usrp-n210: almost working w/ packet router + zpuJosh Blum2010-12-179-301/+313
| | | | | | | | | | | | | | added stack start signal to zpu removed wb perifs in n210 out of 0-16k added reset controller for main app rewire cpu addr line after booted use 0-16k
* | usrp-n210: integrate zpu and packet router, builds but untestedJosh Blum2010-12-141-72/+77
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* | Merge branch 'zpu' into nextJosh Blum2010-12-1411-22/+1567
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| * | zpu: working, modified top level sizes, disable interruptJosh Blum2010-12-142-8/+5
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| * | Merge branch 'packet_router' into zpuJosh Blum2010-12-1215-303/+383
| |\ \ | | | | | | | | | | | | | | | | Conflicts: usrp2/top/u2_rev3/u2_core.v
| * | | zpu: moved top level file in hopes for easy mergeJosh Blum2010-12-122-1014/+229
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| * | | zpu: set all the address widths to 16, grumbleJosh Blum2010-12-084-5/+5
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| * | | zpu: moved stack pointer and made connection for statusJosh Blum2010-12-062-2/+3
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| * | | zpu: brought status signal out to top levelJosh Blum2010-12-061-1/+3
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| * | | zpu: shrank the ram size and address bus to 16kJosh Blum2010-12-061-5/+5
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| * | | zpu: added a zpu + wishbone opencore and integrated into top levelJosh Blum2010-12-0610-10/+1554
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* | | | packet_router: all non ip/udp should also go to bothJosh Blum2010-12-131-7/+5
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* | | packet_router: harmless logic tweaksJosh Blum2010-12-122-11/+8
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* | | packet_router: reverted enable change to dsp framer, it was already correctJosh Blum2010-12-121-2/+1
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* | | packet_router: raise enable for bram reads the cycle before as wellJosh Blum2010-12-112-2/+4
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* | | packet_router: added fifo before cpu_out, tweaked inspection logicJosh Blum2010-12-101-25/+29
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* | | packet_router: gave the inspector a 4th output which is CPU onlyJosh Blum2010-12-101-83/+123
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* | | Merge branch 'ise12' into packet_routerJosh Blum2010-12-1012-107/+241
|\ \ \ | | |/ | |/| | | | | | | | | | Conflicts: usrp2/top/u2_rev3/Makefile usrp2/top/u2_rev3/u2_core.v
| * | time sync on usrp2 as well, added debug pins to time sync.Matt Ettus2010-12-102-2/+10
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| * | slave side can now syncMatt Ettus2010-12-102-13/+33
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| * | Only do udp now, renamed old ports to exp_time_*Matt Ettus2010-12-092-2/+2
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| * | udp is now the defaultMatt Ettus2010-12-092-2/+2
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| * | remove old raw ethernet versionMatt Ettus2010-12-092-882/+0
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| * | reimplemented mimo time transfer to handle 64 bits. Still needsMatt Ettus2010-12-095-71/+164
| | | | | | | | | | | | to sync on the received side.
| * | renamed exp_pps_* to be exp_time_*, which is the mimo synchronization signalMatt Ettus2010-12-095-22/+22
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| * | Merge branch 'time_compare_speedup' into ise12Matt Ettus2010-12-091-2/+16
| |\ \ | | | | | | | | | | | | | | | | * time_compare_speedup: should safely delay the late signal which was causing timing problems
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