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* remove warningsMatt Ettus2010-07-161-1/+1
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* fix to stop endless error packetsMatt Ettus2010-07-091-2/+2
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* updated tests to match new featuresMatt Ettus2010-07-092-4/+9
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* error packets are now valid Extension Context packetsMatt Ettus2010-07-081-11/+32
| | | | | | | error packets don't have a trailer any more streamid is now optional on data packets, set by header register trailer now has a bit to indicate successful End-of-burst hard-coded some header bits to correct values to ensure valid packets
* reload bit for vita rx ctrlJosh Blum2010-07-051-5/+16
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* first attempt at cleaning up the build systemMatt Ettus2010-06-101-0/+13
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* better test program for just the tx sideMatt Ettus2010-05-191-163/+63
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* fix typo, no functionality differenceMatt Ettus2010-05-191-1/+1
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* Xilinx ISE is incorrectly parsing the verilog case statement, this is a ↵Matt Ettus2010-03-241-1/+7
| | | | workaround
* more debug for fixing E'sMatt Ettus2010-03-101-1/+1
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* Merge commit '8d19387a8642caf74179bdcb7eddf1936f473e53' into udpMatt Ettus2010-01-251-2/+5
| | | | | | | | Merge latest VRT changes into UDP branch. Merged from 1 behind the head of VRT because the head moved things around and confused git Conflicts: usrp2/timing/time_64bit.v usrp2/top/u2_core/u2_core.v
* moved into subdirJosh Blum2010-01-229-0/+1138