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* dsp rework: added flusher to vita tx chain on clearJosh Blum2012-02-151-8/+16
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* dsp rework: pass vita clears into dsp modules, unified fifo clearsJosh Blum2012-02-041-3/+2
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* dsp rework: rehash of the custom module stuff and readmeJosh Blum2012-02-021-2/+11
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* dsp rework: custom engine module for rx/tx vita chainJosh Blum2012-02-011-31/+28
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* dsp rework: paramaterize post_engine_bufferingJosh Blum2012-02-011-4/+14
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* dsp rework: finished engine HEADER_OFFSET stuff, add post_engine_bufferingJosh Blum2012-01-301-3/+8
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* dsp rework: work on 8 to 16 engine (usrp2 ok)Josh Blum2012-01-301-1/+1
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* dsp rework: integrated dspengine_8to16, some tweaksJosh Blum2012-01-301-4/+2
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* dsp rework: added double buffer interface to vita txJosh Blum2012-01-281-8/+35
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* dsp rework: implemented dsp changes for other top levelsJosh Blum2012-01-271-1/+1
| | | | added user registers into each toplevel (not used yet)
* dsp rework: renamed dsp signals for frontend IOJosh Blum2012-01-271-1/+1
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* dsp rework: u2_core test implementationJosh Blum2012-01-261-18/+8
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* dsp: added tx_frontend, instantiated in u2/u2pMatt Ettus2011-06-081-2/+2
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* added copyrightsJosh Blum2011-06-071-0/+17
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* clean up a bunch of warnings and incorrect bus widthsMatt Ettus2011-03-161-2/+3
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* generate port number headers in the dsp error unitsMatt Ettus2010-12-151-3/+4
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* no need for second sequence number anymore. Each dsp tx chainMatt Ettus2010-11-211-2/+2
| | | | generates its own flow control packets now.
* get rid of extraneous U messages when we actually had an ACKMatt Ettus2010-11-181-3/+3
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* clear out the vita tx chain and the tx fifo. need to check the fifoMatt Ettus2010-11-111-2/+6
| | | | reset to make sure it is in the correct clock domain.
* don't flag an error on eob ackMatt Ettus2010-11-111-1/+1
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* cleanup for 32 bit seqnumMatt Ettus2010-11-111-4/+3
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* switch to 32 bit sequence numbers. Will wrap in ~15 hours at max rateMatt Ettus2010-11-111-1/+1
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* separated flow control and error reporting on tx path. should work with and ↵Matt Ettus2010-11-111-17/+33
| | | | without flow control
* checkpoint in flow control packet generationMatt Ettus2010-11-111-9/+19
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* sequence number reset upon programming streamidMatt Ettus2010-07-281-2/+3
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* implemented "next packet" and "next burst" policiesMatt Ettus2010-07-281-3/+3
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* more informative error codesMatt Ettus2010-07-281-2/+2
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* introduce new error typesMatt Ettus2010-07-281-12/+21
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* move the streamid so it isn't at the same address as clear_stateMatt Ettus2010-07-281-1/+1
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* fix a typoMatt Ettus2010-07-281-1/+1
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* tx error packets now muxed into the ethernet stream back to the hostMatt Ettus2010-07-281-16/+34
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* checkpoint. New context packet generator to report underruns and other errorsMatt Ettus2010-07-281-0/+43
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-16 01:58:51 +0000