uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	usrp-e100: added readback mux 32 as slave 7 for time readback	Josh Blum	2011-01-14	1	-4/+16
\| \| \| \| \|	created new component wb_readback_mux_16LE.v for 16 wide bus connected vita time pps to vita time controller and readbacks
*	usrp-n210: added power-on-reset controller, reset all wb perifs	Josh Blum	2011-01-10	1	-10/+13
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*	usrp-n210: uploaded most recent bootloader rmi	Josh Blum	2011-01-10	1	-167/+204
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*	usrp-n210: use cpu rst on the wb+icap, uploaded latest bootloader rmi	Josh Blum	2011-01-09	2	-169/+172
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*	Merge branch 'cordic_policy' into next	Josh Blum	2011-01-04	2	-31/+23
\|\ \| \| \| \| \| \| \| \| \| \|	Conflicts: usrp2/top/u2_rev3/u2_core.v usrp2/top/u2plus/u2plus_core.v
\| *	hook up sampled pps in u2plus, remove unused priority encoder, minor cleanups	Matt Ettus	2010-12-30	2	-26/+18
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\| *	processor can read back vita_time at last pps	Matt Ettus	2010-12-30	1	-10/+4
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* \|	usrp-n210: checked in updated bootloader (from next with fixes)	Josh Blum	2010-12-31	1	-36/+36
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* \|	Merge branch 'udp_ports' into next	Josh Blum	2010-12-22	2	-2/+4
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\| * \|	generate port number headers in the dsp error units	Matt Ettus	2010-12-15	2	-2/+4
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* \|	usrp-n210: add missing wires, incr compat, use boot ram as stack space	Josh Blum	2010-12-22	1	-16/+14
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* \|	usrp-n210: delay reset for boot loader stack pointer to init, copied bl.rmi ↵	Josh Blum	2010-12-18	2	-187/+173
\| \| \| \| \| \| \| \|	without debug
* \|	usrp-n210: almost working w/ packet router + zpu	Josh Blum	2010-12-17	3	-293/+305
\| \| \| \| \| \| \| \| \| \| \| \| \| \|	added stack start signal to zpu removed wb perifs in n210 out of 0-16k added reset controller for main app rewire cpu addr line after booted use 0-16k
* \|	usrp-n210: integrate zpu and packet router, builds but untested	Josh Blum	2010-12-14	1	-72/+77
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* \|	zpu: working, modified top level sizes, disable interrupt	Josh Blum	2010-12-14	2	-8/+5
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* \|	Merge branch 'packet_router' into zpu	Josh Blum	2010-12-12	8	-128/+36
\|\ \ \| \| \| \| \| \| \| \| \| \| \| \|	Conflicts: usrp2/top/u2_rev3/u2_core.v
\| * \|	Merge branch 'ise12' into packet_router	Josh Blum	2010-12-10	7	-30/+34
\| \|\\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Conflicts: usrp2/top/u2_rev3/Makefile usrp2/top/u2_rev3/u2_core.v
\| \| *	time sync on usrp2 as well, added debug pins to time sync.	Matt Ettus	2010-12-10	1	-1/+5
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\| \| *	Only do udp now, renamed old ports to exp_time_*	Matt Ettus	2010-12-09	1	-0/+0
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\| \| *	udp is now the default	Matt Ettus	2010-12-09	2	-2/+2
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\| \| *	remove old raw ethernet version	Matt Ettus	2010-12-09	2	-882/+0
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\| \| *	reimplemented mimo time transfer to handle 64 bits. Still needs	Matt Ettus	2010-12-09	1	-1/+2
\| \| \| \| \| \| \| \| \| \| \| \|	to sync on the received side.
\| \| *	renamed exp_pps_* to be exp_time_*, which is the mimo synchronization signal	Matt Ettus	2010-12-09	5	-22/+22
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\| \| *	u2plus: clock lock pin capitalization fail	Nick Foster	2010-12-06	2	-2/+2
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\| * \|	packet_router: renamed top level files in an attempt to merge cleanly	Josh Blum	2010-12-10	4	-1091/+209
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* \| \|	zpu: moved top level file in hopes for easy merge	Josh Blum	2010-12-12	2	-1014/+229
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* \| \|	zpu: moved stack pointer and made connection for status	Josh Blum	2010-12-06	1	-1/+2
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* \| \|	zpu: shrank the ram size and address bus to 16k	Josh Blum	2010-12-06	1	-5/+5
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* \| \|	zpu: added a zpu + wishbone opencore and integrated into top level	Josh Blum	2010-12-06	1	-10/+18
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* \|	packet_router: added status readback for mode, incremented compat number	Josh Blum	2010-11-24	1	-1/+1
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* \|	packet_router: program the dsp udp port and ip addr through setting registers	Josh Blum	2010-11-23	1	-1/+1
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* \|	packet_router: moved udp tx proto machine into packet router, replaced ↵	Josh Blum	2010-11-23	1	-16/+27
\| \| \| \| \| \| \| \|	udp_wrapper in top level with some fifo conversion stuff
* \|	packet_router: implemented crossbar and valve module, moved sreg into router ↵	Josh Blum	2010-11-23	1	-16/+7
\| \| \| \| \| \| \| \|	module
* \|	packet_router: transplanted the async error interface, its now sent into the ↵	Josh Blum	2010-11-23	1	-10/+5
\| \| \| \| \| \| \| \|	packet router to be muxed to com out
* \|	packet_router: fixed sof bug for cpu (== 1), some logic tweaks, added debug	Josh Blum	2010-11-23	1	-1/+3
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* \|	packet_router: registered control flags, added clear to all state machines	Josh Blum	2010-11-23	1	-2/+4
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* \|	packet_router: removed unused status words from readback mux	Josh Blum	2010-11-23	1	-3/+3
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* \|	packet_router: fixed swapped connection typo, dsp tx routing works	Josh Blum	2010-11-23	1	-2/+3
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* \|	packet_router: added all input/output signals to module, created the comm ↵	Josh Blum	2010-11-23	1	-0/+3
\| \| \| \| \| \| \| \|	muxes (in and out)
* \|	packet_router: created inspector and added dsp output (however inspection ↵	Josh Blum	2010-11-23	1	-0/+1
\| \| \| \| \| \| \| \|	logic does not enable it yet)
* \|	packet_router: created nearly empty router with eth in attached to mapped memory	Josh Blum	2010-11-23	1	-19/+14
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*	shouldn't be executable	Matt Ettus	2010-11-20	1	-0/+0
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*	Add flow control and other small vrt fixes to u2p, minor cleanups	Matt Ettus	2010-11-11	2	-34/+38
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*	clear out the vita tx chain and the tx fifo. need to check the fifo	Matt Ettus	2010-11-11	1	-11/+12
\| \| \| \|	reset to make sure it is in the correct clock domain.
*	added ability to truly clear out the entire rx chain. also removed old ↵	Matt Ettus	2010-11-11	1	-3/+9
\| \| \| \|	style fifo in rx.
*	proper triggering for interrupts generated on the dsp_clk	Matt Ettus	2010-11-11	1	-1/+8
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*	increase compatibility number for flow control	Matt Ettus	2010-11-11	1	-1/+1
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*	separated flow control and error reporting on tx path. should work with and ↵	Matt Ettus	2010-11-11	1	-1/+2
\| \| \| \|	without flow control
*	Removed 'ifdef for second DCM that was a deign idea for external SRAM on ↵	Ian Buckley	2010-11-11	1	-49/+4
\| \| \| \| \| \|	u2plus. Hardcoded -90 degree clcok from first DCM as final solution
*	1) u2p has added a new signal from the SRAM to the pinout, RAM_ZZ	Ian Buckley	2010-11-11	2	-2/+5
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	which allows the SRAM to be placed in a sleep mode. This pin was erroniously pulled high at the top level rendering the SRAM unusable. 2) Added declaration for extramfifo debug bus which had got deleted at some point in the past 3) Created a debug bundle of signals from extsramfifo to help diagnose problem 1) 4) u2p Rev1 PCB ommits control of any of the SRAM chip selects. Made a code change so that control logic does not rely on the presence of this pin and ensuring that the SRAM is always placed in READ mode in any idle cycles.