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* Merge branch 'master_nocache' into master_nocache_post_mergeMatt Ettus2010-05-284-15/+20
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| * change the debug pins, which makes it more reliable. This is unnerving.Matt Ettus2010-05-261-1/+2
| * fixes from IJB from 5/24. Basically connect unconnected wires.Matt Ettus2010-05-241-2/+3
| * removes the icache and pipelines the readsMatt Ettus2010-05-202-5/+6
* | non-udp uses a different address for the tx dsp coreMatt Ettus2010-05-271-1/+1
* | manual merge to use localparams from udp versionMatt Ettus2010-05-271-4/+23
* | from UDP branch, changed names because I want these separate from the non-udp...Matt Ettus2010-05-272-0/+1138
* | new files from udp branch added to main MakefileMatt Ettus2010-05-271-1/+19
* | Merge branch 'udp' into master_merge_take2Matt Ettus2010-05-271-1/+1
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| * Merge branch 'master' into udpMatt Ettus2010-05-181-9/+9
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* | get rid of some warnings by declaring setting reg widthMatt Ettus2010-05-181-8/+8
* | settings bus to dsp_clk now uses clock crossing fifoMatt Ettus2010-05-162-8/+15
| * ignoresMatt Ettus2010-05-181-1/+1
| * Merge branch 'master' into udp, removes u2_rev1, rev2Matt Ettus2010-05-1310-2076/+0
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* | remove files for old prototypes, they were confusing peopleMatt Ettus2010-05-1310-2076/+0
| * move dsp settings regs to reclocked setting bus. Works, gets us to within 18...Matt Ettus2010-05-122-12/+19
| * Merge branch 'master' into udpMatt Ettus2010-05-111-1/+1
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* | remove port which is no longer thereMatt Ettus2010-05-111-1/+1
| * Merge branch 'corgan_fixes' into udp_corganMatt Ettus2010-04-263-4/+15
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* | Update config to all eight clock buffers to be used.Johnathan Corgan2010-03-291-1/+1
* | Added timing constraint for Wishbone clock/dsp_clock skewJohnathan Corgan2010-03-291-0/+2
* | Cut debug bus connection to etherenet MAC to make closing timing easierIan Buckley2010-02-241-2/+7
* | Manually assign clk_fpga to BUFG to improve timingJohnathan Corgan2010-02-231-1/+5
* | Moved usrp2 fpga files into usrp2 subdir.Josh Blum2010-01-2241-0/+8275
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* moved fifos around, now easier to see where they are and how bigMatt Ettus2010-03-251-10/+23
* bigger fifo on UDP TX path, to possibly fix overruns on decim=4Matt Ettus2010-03-241-2/+11
* pps and vita time debug pinsMatt Ettus2010-03-231-3/+6
* more debug for fixing E'sMatt Ettus2010-03-101-5/+12
* better debug pins for going after cascading E'sMatt Ettus2010-03-101-1/+5
* Merge commit '8d19387a8642caf74179bdcb7eddf1936f473e53' into udpMatt Ettus2010-01-252-27/+26
* just debug pin changesMatt Ettus2010-01-251-1/+5
* moved into subdirJosh Blum2010-01-2241-0/+8358