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* dsp rework: rehash of the custom module stuff and readmeJosh Blum2012-02-0210-28/+61
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* dsp rework: custom engine module for rx/tx vita chainJosh Blum2012-02-014-11/+21
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* Merge branch 'slave_fifo_rebase' into dsp_reworkJosh Blum2012-02-013-20/+27
|\ | | | | | | | | Conflicts: usrp2/top/B100/u1plus_core.v
| * Fix missing B100 core_compile (poor Git hygeine)Nick Foster2012-01-231-0/+1
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| * b100: bumped fpga compat number for slave fifo modeJosh Blum2012-01-121-1/+1
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| * B100: moar buffering on TX for better performance in bidirectional applicationsNick Foster2012-01-121-2/+2
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| * Squashed slave mode changes onto master.Nick Foster2012-01-124-19/+25
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* | dsp rework: paramaterize post_engine_bufferingJosh Blum2012-02-012-0/+2
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* | dsp rework: added double buffer interface to vita txJosh Blum2012-01-284-4/+6
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* | dsp rework: moved scale and round into ddc chainJosh Blum2012-01-284-4/+4
| | | | | | | | 16to8 engine now performs only a clip from 16->8
* | dsp rework: top level fixes B100/E100Josh Blum2012-01-274-8/+9
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* | dsp rework: integrated custom dsp module shellsJosh Blum2012-01-2712-22/+46
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* | dsp rework: implemented dsp changes for other top levelsJosh Blum2012-01-274-100/+127
| | | | | | | | added user registers into each toplevel (not used yet)
* | dsp rework: renamed dsp signals for frontend IOJosh Blum2012-01-271-11/+11
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* | dsp rework: u2_core test implementationJosh Blum2012-01-264-12/+21
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* n2xx: updated bootloader to latest build in uhd masterJosh Blum2012-01-111-377/+377
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* usrp2/nseries: restored clock/serdes readbackJosh Blum2011-11-232-4/+4
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* need more umph out of correction valuesJosh Blum2011-11-104-4/+4
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* remove unused irq to meet timingJosh Blum2011-11-052-21/+7
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* convenience makefiles for top level projectsJosh Blum2011-11-052-0/+31
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* increase vita rx fifosize to 10, like USRP2, make things workJosh Blum2011-11-042-4/+4
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* u1e: fix unattached nets from copy-paste errorMatt Ettus2011-11-041-3/+3
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* b100: fix warnings, complete removal of test codeMatt Ettus2011-11-041-16/+4
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* u1e/u1p: GPIOs switched over to setting regsMatt Ettus2011-10-272-32/+45
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* 32 bit compat number for E and B seriesJosh Blum2011-10-262-10/+8
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* u1e/u1p: removed led setting regMatt Ettus2011-10-262-14/+4
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* u1p/u1e: partially redone atr and gpio redoMatt Ettus2011-10-262-33/+11
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* u2/u2p: use new setting_reg based gpios, gets it off of wbMatt Ettus2011-10-262-17/+27
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* u1e/u1p: remove unused UARTMatt Ettus2011-10-262-24/+0
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* u2/u2p: move nearly all setting regs onto dsp_clkMatt Ettus2011-10-262-30/+37
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* u2/u2p: remove dead comments and codeMatt Ettus2011-10-262-84/+16
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* usrp2: fix typo in top level core filesJosh Blum2011-10-262-2/+2
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* connect and map b100 and e100 front-panel ledsJosh Blum2011-10-112-2/+2
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* E100: GPSDO serial port level conversionNick Foster2011-09-282-2/+9
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* B100: use gpif_misc on R2 hw, invert direction of gpif_misc pinsNick Foster2011-09-191-2/+2
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* u1e,u1p: turn off debug pins, misc cleanupsMatt Ettus2011-09-082-26/+10
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* u1p: proper format in ucf fileMatt Ettus2011-09-085-4/+474
| | | | u1p: build separate u1plus (prototypes) and B100 (release)
* u1e: relax GPMC constraints, eases P&RMatt Ettus2011-09-021-10/+10
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* u1e: separate build for E100 and E110, just a different FPGAMatt Ettus2011-09-012-1/+102
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* e100: squashed work on bus implementation on GPMCJosh Blum2011-08-293-42/+24
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* fpga: minor tweaks to build systemJosh Blum2011-08-262-2/+4
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* b100: gpif_rst resynced to gpif_clkMatt Ettus2011-08-261-1/+1
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* usrp2: reconnect frontend calibration, timing meetsJosh Blum2011-08-262-2/+2
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* e100: continuation of the atr fix to get e100 to buildJosh Blum2011-08-151-2/+2
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* usrp2: bump FPGA minor number to 2 for patch releaseJosh Blum2011-08-152-2/+2
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* N2x0: print constraints summary from makefileJosh Blum2011-08-151-0/+1
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* N2x0: added a Makefile to build all N2x0 projects (make -j4)Josh Blum2011-08-151-0/+22
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* N2x0: delay ADC A inversion so A and B are latched in the sameJosh Blum2011-08-151-3/+5
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* B100/E100: fix ATR RX mode pins not connectedNick Foster2011-08-102-4/+4
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* usrp2: remove old unused readback mux valueJosh Blum2011-07-282-2/+2
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