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* u1p: modernize, fix warnings, debug pinsMatt Ettus2011-05-261-22/+10
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* u1p: debug pinsMatt Ettus2011-05-261-2/+3
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* u1p: unused signalsMatt Ettus2011-05-261-4/+0
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* u1p: pass tx status/error packets back through GPIF over the response ↵Matt Ettus2011-05-261-12/+5
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* u1p: added loopback and timed capability just like u1eMatt Ettus2011-05-262-9/+20
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* u1p: revert change to address bus widthMatt Ettus2011-05-261-2/+2
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* u1p: use icarus verilog to find warningsMatt Ettus2011-05-261-0/+2
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* u1p: fix bus widths and other warningsMatt Ettus2011-05-261-9/+10
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* u1p: added debug0, debug1 for GPIF debuggingNick Foster2011-05-261-0/+3
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* u1p: remove extram from MakefileNick Foster2011-05-261-1/+0
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* u1p: catch up with all the recent u1e changesMatt Ettus2011-05-261-107/+91
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* modernize the make files, it now compiles. not tested.Matt Ettus2011-05-261-56/+9
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* I2C slave address decoding for 16-bit dw instead of 32-bitNick Foster2011-05-261-1/+1
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* Fixed I2C pin names.Nick Foster2011-05-261-1/+1
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* put gpio back inMatt Ettus2011-05-261-4/+3
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* send reset to the gpifMatt Ettus2011-05-261-2/+3
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* constrain the gpif clockMatt Ettus2011-05-261-0/+3
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* redone gpif interface to match nick's new specMatt Ettus2011-05-261-2/+2
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* use vita_tx_chain top level blockMatt Ettus2011-05-261-22/+14
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* added a loopback control port, will do full wishbone interface laterMatt Ettus2011-05-261-6/+8
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* progress on gpif interfaceMatt Ettus2011-05-261-9/+1
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* gpif skeletonsMatt Ettus2011-05-263-134/+31
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* copied over from u1e, most pins hooked up.Matt Ettus2011-05-266-637/+588
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* Use the 4th LED which is shared on the cfg_init_b pinMatt Ettus2011-05-262-6/+10
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* compiles nowMatt Ettus2011-05-264-643/+185
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* copied over from other repo. Beginnings of a skeleton fpga image for USRP1-PlusMatt Ettus2011-05-2611-0/+1854
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* u1e: incremented compat # to 4 for vita length changeJosh Blum2011-05-201-1/+1
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* N210: how the heck did the PPS fix get dropped againNick Foster2011-05-201-1/+4
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* u1e: get dsp_framer36 from u1p so it can skip the protocol headerMatt Ettus2011-05-091-1/+1
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* u1e: switch to vita_rx_chain module just like other toplevelsMatt Ettus2011-05-092-20/+11
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* N210: Bootloader includes TXRX. No longer uses safe firmware as backup fw.Nick Foster2011-04-221-368/+368
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* N210: Make new bootloader ignore safe firmware when safe mode button is pushed.Nick Foster2011-04-211-331/+331
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* N210: bootram expanded to 16KB (8 BRAMs) and UDP bootloader addedNick Foster2011-04-211-398/+398
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* N210: UDP bootloader first stab (16K boot RAM)Nick Foster2011-04-212-172/+428
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* Merge branch 'master' into nextMatt Ettus2011-03-273-5/+106
|\ | | | | | | | | | | | | * master: u2p: N200 Makefile u1e: use icarus verilog for lint clean up a bunch of warnings and incorrect bus widths
| * u2p: N200 MakefileMatt Ettus2011-03-231-0/+98
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| * u1e: use icarus verilog for lintMatt Ettus2011-03-161-0/+2
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| * clean up a bunch of warnings and incorrect bus widthsMatt Ettus2011-03-161-5/+6
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* | reverted zpu stack pointer change, incremented fpga compat numberJosh Blum2011-03-172-4/+4
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* | memory_reorg: new bootloader.rmi for n210Josh Blum2011-03-161-154/+154
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* | u2p: fixed bootloader remappingMatt Ettus2011-03-161-35/+32
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* | u2/u2p: reorganized memory mapMatt Ettus2011-03-162-51/+45
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* | u2/u2p: fixed instance nameMatt Ettus2011-03-162-2/+2
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* | u2/u2p: reworked settings bus addressesMatt Ettus2011-03-162-33/+36
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* u1e: removed old directory from makeMatt Ettus2011-03-151-1/+0
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* u1e: keep up with fixes made for u2/u2p, make it compile againMatt Ettus2011-03-151-1/+0
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* fix: vita_rx_chain1 should use unit2 (since err0 uses unit1)Josh Blum2011-03-082-2/+2
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* u2/u2p: enlarge dsp rx fifos to handle jumbo frames, enable in u2plus as wellMatt Ettus2011-03-052-20/+8
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* u2/u2p: moved dsp framer into vita_rx_chainMatt Ettus2011-03-051-18/+6
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* Merge branch 'gpmc_testing' into ethfifo_reorgMatt Ettus2011-03-031-81/+18
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | * gpmc_testing: timed packet generator : Temporarily use a checksum rather than a crc to validate packet integrity. correct port names fifo36_mux now has shortfifos on the input ports as well as output timed tester : Bring out src/dst flags for rx chain for testing. u1e: hook up tester controls move declarations to before use hook up under/overruns for debug purposes e100: integrate loopback and timed testing into main image Fix endianess for packet length and sequence number for e100 timed image. put these files in the right place. newfifo is long gone.