uhd - Ettus' UHD Repository

	Commit message (Expand)	Author	Age	Files	Lines
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\| * \| \| \|	remove files for old prototypes, they were confusing people	Matt Ettus	2010-05-13	10	-2076/+0
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* \| \| \|	send bigger packets to reduce cpu load	Matt Ettus	2010-05-20	1	-2/+2
* \| \| \|	put over/underrun on debug bus, remove high order address bits	Matt Ettus	2010-05-20	1	-1/+2
* \| \| \|	Merge branch 'u1e' of ettus.sourcerepo.com:ettus/fpgapriv into u1e	Matt Ettus	2010-05-20	1	-4/+2
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\| * \| \| \|	better debug pins	Matt Ettus	2010-05-17	1	-6/+4
* \| \| \| \|	combined timed and crc cases. fifo pacer produces/consumes at a fixed rate	Matt Ettus	2010-05-20	2	-34/+24
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* \| \| \|	moved fifos into gpmc_async, reorganized top level a bit, added in crc packet...	Matt Ettus	2010-05-12	2	-22/+43
* \| \| \|	Merge branch 'master' into u1e	Matt Ettus	2010-05-12	4	-5/+16
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\| * \| \|	remove port which is no longer there	Matt Ettus	2010-05-11	1	-1/+1
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\| * \|	Update config to all eight clock buffers to be used.	Johnathan Corgan	2010-03-29	1	-1/+1
\| * \|	Added timing constraint for Wishbone clock/dsp_clock skew	Johnathan Corgan	2010-03-29	1	-0/+2
\| * \|	Cut debug bus connection to etherenet MAC to make closing timing easier	Ian Buckley	2010-02-24	1	-2/+7
\| * \|	Manually assign clk_fpga to BUFG to improve timing	Johnathan Corgan	2010-02-23	1	-1/+5
* \| \|	switched passthru of cgen_sen_b to gpio127, made a note of it. No more safe_...	Matt Ettus	2010-05-10	8	-561/+9
* \| \|	proper signal level for 24 bit data	Matt Ettus	2010-05-10	1	-2/+7
* \| \|	SPI passthru for programming clock gen chip on brand new boards	Matt Ettus	2010-05-07	3	-0/+391
* \| \|	added DAC output pins, and a sine wave generator to test them	Matt Ettus	2010-05-04	3	-18/+63
* \| \|	Merge branch 'u1e' of ettus.sourcerepo.com:ettus/fpgapriv into u1e	Matt Ettus	2010-05-04	2	-0/+14
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\| * \| \|	add timing constraints. Just have main clock signal at 64 MHz for now.	Matt Ettus	2010-05-04	2	-0/+14
* \| \| \|	changed comment	Matt Ettus	2010-05-04	1	-1/+1
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* \| \|	separate timed tx and rx instead of loopback	Matt Ettus	2010-04-28	1	-3/+51
* \| \|	send bus error to debug pins	Matt Ettus	2010-04-26	1	-2/+4
* \| \|	Pass previously unused GPIOs to debug pins to help debug interrupts	Matt Ettus	2010-04-24	3	-16/+21
* \| \|	find time_64bit	Matt Ettus	2010-04-20	1	-0/+1
* \| \|	added pps and time capability	Matt Ettus	2010-04-15	3	-5/+21
* \| \|	access frame length regs from wishbone	Matt Ettus	2010-04-15	1	-6/+14
* \| \|	async seems to work with packet lengths now. Still need to do wishbone regs ...	Matt Ettus	2010-04-15	1	-3/+3
* \| \|	async gpmc progress	Matt Ettus	2010-04-15	2	-18/+20
* \| \|	synchronous and asynchronous gpmc models	Matt Ettus	2010-04-15	1	-1/+1
* \| \|	handle all tri-state in the top level of gpmc	Matt Ettus	2010-04-15	1	-0/+2
* \| \|	more progress on synchronous interface	Matt Ettus	2010-04-14	1	-0/+1
* \| \|	renamed to async. Will be building a sync version for GPMC_CLK	Matt Ettus	2010-04-14	1	-1/+1
* \| \|	added in a loopback fifo	Matt Ettus	2010-04-14	1	-4/+11
* \| \|	minor changes to get it to synthesize	Matt Ettus	2010-04-13	1	-0/+3
* \| \|	replaced ram interface with a fifo interface. still need to do rx side	Matt Ettus	2010-04-12	1	-39/+7
* \| \|	added 16-bit wide atr controller	Matt Ettus	2010-04-01	2	-33/+44
* \| \|	connect up the 16 bit spi core	Matt Ettus	2010-03-26	2	-5/+4
* \| \|	connect 2 clock gen controls and 3 status pins to the wishbone so they can be...	Matt Ettus	2010-03-26	3	-8/+26
* \| \|	Merge branch 'udp' into u1e	Matt Ettus	2010-03-25	2	-57/+179
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\| * \|	moved fifos around, now easier to see where they are and how big	Matt Ettus	2010-03-25	1	-10/+23
\| * \|	bigger fifo on UDP TX path, to possibly fix overruns on decim=4	Matt Ettus	2010-03-24	1	-2/+11
\| * \|	pps and vita time debug pins	Matt Ettus	2010-03-23	1	-3/+6
\| * \|	more debug for fixing E's	Matt Ettus	2010-03-10	1	-5/+12
\| * \|	better debug pins for going after cascading E's	Matt Ettus	2010-03-10	1	-1/+5
\| * \|	Merge commit '8d19387a8642caf74179bdcb7eddf1936f473e53' into udp	Matt Ettus	2010-01-25	2	-27/+26
\| * \|	just debug pin changes	Matt Ettus	2010-01-25	1	-1/+5
\| * \|	moved into subdir	Josh Blum	2010-01-22	41	-0/+8358
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* \|	connected spi pins, but the spi core still needs to be redone for 16 bit inte...	Matt Ettus	2010-03-25	3	-40/+60
* \|	debug pins	Matt Ettus	2010-02-25	1	-2/+3
* \|	invert the pushbuttons since they are active low	Matt Ettus	2010-02-25	1	-2/+2