| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | | | zpu: moved top level file in hopes for easy merge | Josh Blum | 2010-12-12 | 2 | -1014/+229 |
| * | | | zpu: moved stack pointer and made connection for status | Josh Blum | 2010-12-06 | 1 | -1/+2 |
| * | | | zpu: shrank the ram size and address bus to 16k | Josh Blum | 2010-12-06 | 1 | -5/+5 |
| * | | | zpu: added a zpu + wishbone opencore and integrated into top level | Josh Blum | 2010-12-06 | 1 | -10/+18 |
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| * | | packet_router: added status readback for mode, incremented compat number | Josh Blum | 2010-11-24 | 1 | -1/+1 |
| * | | packet_router: program the dsp udp port and ip addr through setting registers | Josh Blum | 2010-11-23 | 1 | -1/+1 |
| * | | packet_router: moved udp tx proto machine into packet router, replaced udp_wr... | Josh Blum | 2010-11-23 | 1 | -16/+27 |
| * | | packet_router: implemented crossbar and valve module, moved sreg into router ... | Josh Blum | 2010-11-23 | 1 | -16/+7 |
| * | | packet_router: transplanted the async error interface, its now sent into the ... | Josh Blum | 2010-11-23 | 1 | -10/+5 |
| * | | packet_router: fixed sof bug for cpu (== 1), some logic tweaks, added debug | Josh Blum | 2010-11-23 | 1 | -1/+3 |
| * | | packet_router: registered control flags, added clear to all state machines | Josh Blum | 2010-11-23 | 1 | -2/+4 |
| * | | packet_router: removed unused status words from readback mux | Josh Blum | 2010-11-23 | 1 | -3/+3 |
| * | | packet_router: fixed swapped connection typo, dsp tx routing works | Josh Blum | 2010-11-23 | 1 | -2/+3 |
| * | | packet_router: added all input/output signals to module, created the comm mux... | Josh Blum | 2010-11-23 | 1 | -0/+3 |
| * | | packet_router: created inspector and added dsp output (however inspection log... | Josh Blum | 2010-11-23 | 1 | -0/+1 |
| * | | packet_router: created nearly empty router with eth in attached to mapped memory | Josh Blum | 2010-11-23 | 1 | -19/+14 |
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| * | shouldn't be executable | Matt Ettus | 2010-11-20 | 1 | -0/+0 |
| * | Add flow control and other small vrt fixes to u2p, minor cleanups | Matt Ettus | 2010-11-11 | 2 | -34/+38 |
| * | clear out the vita tx chain and the tx fifo. need to check the fifo | Matt Ettus | 2010-11-11 | 1 | -11/+12 |
| * | added ability to truly clear out the entire rx chain. also removed old style... | Matt Ettus | 2010-11-11 | 1 | -3/+9 |
| * | proper triggering for interrupts generated on the dsp_clk | Matt Ettus | 2010-11-11 | 1 | -1/+8 |
| * | increase compatibility number for flow control | Matt Ettus | 2010-11-11 | 1 | -1/+1 |
| * | separated flow control and error reporting on tx path. should work with and ... | Matt Ettus | 2010-11-11 | 1 | -1/+2 |
| * | Removed 'ifdef for second DCM that was a deign idea for external SRAM on u2pl... | Ian Buckley | 2010-11-11 | 1 | -49/+4 |
| * | 1) u2p has added a new signal from the SRAM to the pinout, RAM_ZZ | Ian Buckley | 2010-11-11 | 2 | -2/+5 |
| * | Defaulted all SRAM pins to LVCMOS25 8mA FAST | Ian Buckley | 2010-11-11 | 1 | -67/+67 |
| * | Placed 2nd DCM into `ifdef DCM_FOR_RAMCLK which is dissabled by default | Ian Buckley | 2010-11-11 | 2 | -7/+23 |
| * | Added external RAM FIFO to u2plus. | Ian Buckley | 2010-11-11 | 4 | -7/+123 |
| * | revert unneeded changes and incorrect comments | Matt Ettus | 2010-11-11 | 1 | -32/+32 |
| * | reconnect GPIOs, remove debug pins, meets timing now | Matt Ettus | 2010-11-11 | 1 | -5/+3 |
| * | Modified phase shift of DCM1 to -64 which is intended to give more timing mar... | Ian Buckley | 2010-11-11 | 1 | -1/+1 |
| * | Enabled phase offset adjustment on DCM_INST1 which drives the external Fast S... | Ian Buckley | 2010-11-11 | 1 | -12/+12 |
| * | Added to DCM's and some BUFG's to align the internal 125MHz clock edge with i... | Ian Buckley | 2010-11-11 | 4 | -5/+100 |
| * | hangedddddddextrnal fifo size to use full NoBL SRAM | ianb | 2010-11-11 | 1 | -1/+1 |
| * | Corrected extfifo code so that all registers that are on SRAM signals are pac... | ianb | 2010-11-11 | 2 | -37/+42 |
| * | Added a bunch of debug signals. | Ian Buckley | 2010-11-11 | 1 | -4/+5 |
| * | Regenerated FIFO with lower trigger level for almost full flag to reflect log... | Ian Buckley | 2010-11-11 | 1 | -1/+2 |
| * | External FIFO tested in simulation and on USRP2 from decimation 64->8 with cu... | Ian Buckley | 2010-11-11 | 5 | -142/+201 |
| * | Merge branch 'u1e' into merge_u1e | Matt Ettus | 2010-11-10 | 19 | -0/+1381 |
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| | * | invert led signals because they are active low | Matt Ettus | 2010-11-09 | 1 | -1/+1 |
| | * | duh | Matt Ettus | 2010-11-04 | 1 | -1/+1 |
| | * | better debug pins | Matt Ettus | 2010-09-23 | 2 | -7/+11 |
| | * | watch the ethernet chip select on our debug bus | Matt Ettus | 2010-09-23 | 3 | -6/+8 |
| | * | fix timing issue on DAC outputs with rev 2. This puts the whole system on a ... | Matt Ettus | 2010-09-21 | 2 | -50/+25 |
| | * | send all gpmc signals to mictor | Matt Ettus | 2010-09-16 | 4 | -0/+201 |
| | * | updated pins to match rev2, removed dip switch, etc. seems to compile ok. | Matt Ettus | 2010-09-09 | 3 | -137/+130 |
| | * | pins are different on rev2 | Matt Ettus | 2010-09-09 | 1 | -264/+4 |
| | * | fixed makefile to compile with our new system | Matt Ettus | 2010-09-07 | 1 | -44/+36 |
| | * | add register to tell host about compatibility level and which image we are using | Matt Ettus | 2010-08-30 | 1 | -5/+14 |
| | * | move declaration to make loopback compile | Matt Ettus | 2010-08-27 | 1 | -1/+2 |
