| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | works, leds on front count up. | Matt Ettus | 2010-06-07 | 1 | -341/+2 |
| * | skeleton files copied over from a dead branch | Matt Ettus | 2010-06-07 | 9 | -374/+1728 |
| * | non-udp uses a different address for the tx dsp core | Matt Ettus | 2010-05-27 | 1 | -1/+1 |
| * | manual merge to use localparams from udp version | Matt Ettus | 2010-05-27 | 1 | -4/+23 |
| * | from UDP branch, changed names because I want these separate from the non-udp... | Matt Ettus | 2010-05-27 | 2 | -0/+1138 |
| * | new files from udp branch added to main Makefile | Matt Ettus | 2010-05-27 | 1 | -1/+19 |
| * | Merge branch 'udp' into master_merge_take2 | Matt Ettus | 2010-05-27 | 1 | -1/+1 |
| |\ |
|
| | * | Merge branch 'master' into udp | Matt Ettus | 2010-05-18 | 1 | -9/+9 |
| | |\
| |/
|/| |
|
| * | | get rid of some warnings by declaring setting reg width | Matt Ettus | 2010-05-18 | 1 | -8/+8 |
| * | | settings bus to dsp_clk now uses clock crossing fifo | Matt Ettus | 2010-05-16 | 2 | -8/+15 |
| | * | ignores | Matt Ettus | 2010-05-18 | 1 | -1/+1 |
| | * | Merge branch 'master' into udp, removes u2_rev1, rev2 | Matt Ettus | 2010-05-13 | 10 | -2076/+0 |
| | |\
| |/
|/| |
|
| * | | remove files for old prototypes, they were confusing people | Matt Ettus | 2010-05-13 | 10 | -2076/+0 |
| | * | move dsp settings regs to reclocked setting bus. Works, gets us to within 18... | Matt Ettus | 2010-05-12 | 2 | -12/+19 |
| | * | Merge branch 'master' into udp | Matt Ettus | 2010-05-11 | 1 | -1/+1 |
| | |\
| |/
|/| |
|
| * | | remove port which is no longer there | Matt Ettus | 2010-05-11 | 1 | -1/+1 |
| | * | Merge branch 'corgan_fixes' into udp_corgan | Matt Ettus | 2010-04-26 | 3 | -4/+15 |
| | |\
| |/
|/| |
|
| * | | Update config to all eight clock buffers to be used. | Johnathan Corgan | 2010-03-29 | 1 | -1/+1 |
| * | | Added timing constraint for Wishbone clock/dsp_clock skew | Johnathan Corgan | 2010-03-29 | 1 | -0/+2 |
| * | | Cut debug bus connection to etherenet MAC to make closing timing easier | Ian Buckley | 2010-02-24 | 1 | -2/+7 |
| * | | Manually assign clk_fpga to BUFG to improve timing | Johnathan Corgan | 2010-02-23 | 1 | -1/+5 |
| * | | Moved usrp2 fpga files into usrp2 subdir. | Josh Blum | 2010-01-22 | 41 | -0/+8275 |
| / |
|
| * | moved fifos around, now easier to see where they are and how big | Matt Ettus | 2010-03-25 | 1 | -10/+23 |
| * | bigger fifo on UDP TX path, to possibly fix overruns on decim=4 | Matt Ettus | 2010-03-24 | 1 | -2/+11 |
| * | pps and vita time debug pins | Matt Ettus | 2010-03-23 | 1 | -3/+6 |
| * | more debug for fixing E's | Matt Ettus | 2010-03-10 | 1 | -5/+12 |
| * | better debug pins for going after cascading E's | Matt Ettus | 2010-03-10 | 1 | -1/+5 |
| * | Merge commit '8d19387a8642caf74179bdcb7eddf1936f473e53' into udp | Matt Ettus | 2010-01-25 | 2 | -27/+26 |
| * | just debug pin changes | Matt Ettus | 2010-01-25 | 1 | -1/+5 |
| * | moved into subdir | Josh Blum | 2010-01-22 | 41 | -0/+8358 |
