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* N210: Make new bootloader ignore safe firmware when safe mode button is pushed.Nick Foster2011-04-211-331/+331
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* N210: bootram expanded to 16KB (8 BRAMs) and UDP bootloader addedNick Foster2011-04-211-398/+398
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* N210: UDP bootloader first stab (16K boot RAM)Nick Foster2011-04-212-172/+428
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* Merge branch 'master' into nextMatt Ettus2011-03-271-0/+98
|\ | | | | | | | | | | | | * master: u2p: N200 Makefile u1e: use icarus verilog for lint clean up a bunch of warnings and incorrect bus widths
| * u2p: N200 MakefileMatt Ettus2011-03-231-0/+98
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* | reverted zpu stack pointer change, incremented fpga compat numberJosh Blum2011-03-171-2/+2
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* | memory_reorg: new bootloader.rmi for n210Josh Blum2011-03-161-154/+154
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* | u2p: fixed bootloader remappingMatt Ettus2011-03-161-35/+32
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* | u2/u2p: reorganized memory mapMatt Ettus2011-03-161-34/+28
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* | u2/u2p: fixed instance nameMatt Ettus2011-03-161-1/+1
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* | u2/u2p: reworked settings bus addressesMatt Ettus2011-03-161-14/+18
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* fix: vita_rx_chain1 should use unit2 (since err0 uses unit1)Josh Blum2011-03-081-1/+1
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* u2/u2p: enlarge dsp rx fifos to handle jumbo frames, enable in u2plus as wellMatt Ettus2011-03-051-19/+7
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* remove references to old directoryMatt Ettus2011-03-031-1/+0
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* u2plus: catch up with ethfifo changes which were on u2Matt Ettus2011-03-031-39/+4
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* u2/u2p: shrunk ETH TX FIFO, further u2/u2p harmonizationMatt Ettus2011-02-211-7/+6
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* increase compat number for double dsp changeMatt Ettus2011-02-171-1/+1
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* u2/u2p: reduce unneeded RX DSP bufferingMatt Ettus2011-02-171-1/+1
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* u2p: 2nd DSP now in u2p as wellMatt Ettus2011-02-171-25/+56
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* u2/u2p: proper hookup of vita_rx_chainMatt Ettus2011-02-171-5/+5
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* clean up rx dsp and some other nets in prep for dual dspMatt Ettus2011-02-161-52/+43
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* packet_router: added support for two dsps into routerJosh Blum2011-02-151-1/+2
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* usrp-n210: added power-on-reset controller, reset all wb perifsJosh Blum2011-01-101-10/+13
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* usrp-n210: uploaded most recent bootloader rmiJosh Blum2011-01-101-167/+204
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* usrp-n210: use cpu rst on the wb+icap, uploaded latest bootloader rmiJosh Blum2011-01-092-169/+172
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* Merge branch 'cordic_policy' into nextJosh Blum2011-01-041-11/+8
|\ | | | | | | | | | | Conflicts: usrp2/top/u2_rev3/u2_core.v usrp2/top/u2plus/u2plus_core.v
| * hook up sampled pps in u2plus, remove unused priority encoder, minor cleanupsMatt Ettus2010-12-301-14/+8
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* | usrp-n210: checked in updated bootloader (from next with fixes)Josh Blum2010-12-311-36/+36
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* | Merge branch 'udp_ports' into nextJosh Blum2010-12-221-1/+2
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| * | generate port number headers in the dsp error unitsMatt Ettus2010-12-151-1/+2
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* | usrp-n210: add missing wires, incr compat, use boot ram as stack spaceJosh Blum2010-12-221-16/+14
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* | usrp-n210: delay reset for boot loader stack pointer to init, copied bl.rmi ↵Josh Blum2010-12-182-187/+173
| | | | | | | | without debug
* | usrp-n210: almost working w/ packet router + zpuJosh Blum2010-12-172-280/+302
| | | | | | | | | | | | | | added stack start signal to zpu removed wb perifs in n210 out of 0-16k added reset controller for main app rewire cpu addr line after booted use 0-16k
* | usrp-n210: integrate zpu and packet router, builds but untestedJosh Blum2010-12-141-72/+77
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* reimplemented mimo time transfer to handle 64 bits. Still needsMatt Ettus2010-12-091-1/+2
| | | | to sync on the received side.
* renamed exp_pps_* to be exp_time_*, which is the mimo synchronization signalMatt Ettus2010-12-092-4/+4
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* u2plus: clock lock pin capitalization failNick Foster2010-12-062-2/+2
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* Add flow control and other small vrt fixes to u2p, minor cleanupsMatt Ettus2010-11-111-30/+37
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* Removed 'ifdef for second DCM that was a deign idea for external SRAM on ↵Ian Buckley2010-11-111-49/+4
| | | | | | u2plus. Hardcoded -90 degree clcok from first DCM as final solution
* 1) u2p has added a new signal from the SRAM to the pinout, RAM_ZZIan Buckley2010-11-112-2/+5
| | | | | | | | | | | | | | | which allows the SRAM to be placed in a sleep mode. This pin was erroniously pulled high at the top level rendering the SRAM unusable. 2) Added declaration for extramfifo debug bus which had got deleted at some point in the past 3) Created a debug bundle of signals from extsramfifo to help diagnose problem 1) 4) u2p Rev1 PCB ommits control of any of the SRAM chip selects. Made a code change so that control logic does not rely on the presence of this pin and ensuring that the SRAM is always placed in READ mode in any idle cycles.
* Defaulted all SRAM pins to LVCMOS25 8mA FASTIan Buckley2010-11-111-67/+67
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* Placed 2nd DCM into `ifdef DCM_FOR_RAMCLK which is dissabled by defaultIan Buckley2010-11-112-7/+23
| | | | | Derived RAMCLK from 270degree offset of principle core DCM giving theoretical 2.5nS timing advance on RAM_CLK relative to RAM_* signals.
* Added external RAM FIFO to u2plus.Ian Buckley2010-11-114-7/+123
| | | | | | | | | | Added code branch to ext_fifo.v using generate that instantiates different input and out fifo's and touched nobl_fifo code so that it works at 18 and 36bit widths. Added 2nd DCM to top level to generate off chip RAMCLK. Added explicit I/O instances to top level for tristate drivers and changed signals to core as needed. Creted new FIFO's in core gen to replace much larger FIFO's used on u2rev3
* remove old commented out codeMatt Ettus2010-11-091-4/+2
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* U2P: Working ICAP bootloader. Should be ready for release.Nick Foster2010-10-081-224/+236
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* U2P: modified ICAP. turns out ICAP needs clock disabled while CE is not ↵Nick Foster2010-10-071-199/+228
| | | | | | asserted. which is the point of a CE, but... it works. Also committed latest bootloader, might not be final version.
* separate the bootloader image into another fileMatt Ettus2010-10-072-204/+205
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* U2P: newest bootloader with support for 32Mbit flashNick Foster2010-10-051-157/+196
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* Fixed PPS. Instantiation was miscapitalized.Nick Foster2010-08-271-1/+1
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* invert adc_a because it is inverted on schematic. Also clean up extraneousMatt Ettus2010-08-251-15/+18
| | | | adc signals from old adc on U2
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