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* u2plus: clock lock pin capitalization failNick Foster2010-12-061-1/+1
* Removed 'ifdef for second DCM that was a deign idea for external SRAM on u2pl...Ian Buckley2010-11-111-49/+4
* 1) u2p has added a new signal from the SRAM to the pinout, RAM_ZZIan Buckley2010-11-111-1/+2
* Placed 2nd DCM into `ifdef DCM_FOR_RAMCLK which is dissabled by defaultIan Buckley2010-11-111-3/+19
* Added external RAM FIFO to u2plus.Ian Buckley2010-11-111-4/+79
* Fixed PPS. Instantiation was miscapitalized.Nick Foster2010-08-271-1/+1
* invert adc_a because it is inverted on schematic. Also clean up extraneousMatt Ettus2010-08-251-15/+18
* SWAP DAC A and B, invert B to match schematicsMatt Ettus2010-08-251-3/+4
* Use new tx_policy stuff, reassigned leds to be just like U2Matt Ettus2010-08-251-1/+1
* Added a sanity checker Python script.Nick Foster2010-08-241-1/+1
* quad uart instead of single, for the extra on board serial portsMatt Ettus2010-08-111-3/+2
* Added DCM reset line to sr.Nick Foster2010-07-291-3/+5
* latest bootloader in core, fixed eth_led to be active high, connected eth clkNick Foster2010-07-281-2/+2
* Merge branch 'u2p' of ettus.sourcerepo.com:ettus/fpgapriv into u2pNick Foster2010-07-271-0/+4
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| * capitalization matchingMatt Ettus2010-07-211-1/+5
* | fix timing races on ADC and DAC pinsNick Foster2010-07-271-10/+20
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* reconnect the serial clockMatt Ettus2010-07-201-1/+1
* connect SPI to adc, correct capitalization of SEN pinsMatt Ettus2010-07-201-8/+9
* pushbutton now goes into interrupt controller, can be read from software. No...Matt Ettus2010-07-191-0/+1
* separate boot ram, redone memory map, connected uartMatt Ettus2010-07-131-3/+3
* further cleanupMatt Ettus2010-07-121-3/+3
* actually generates an imageMatt Ettus2010-06-091-11/+6
* skeleton files copied over from a dead branchMatt Ettus2010-06-071-132/+142
* Moved usrp2 fpga files into usrp2 subdir.Josh Blum2010-01-221-0/+377