| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | External FIFO tested in simulation and on USRP2 from decimation 64->8 with ↵ | Ian Buckley | 2010-11-11 | 1 | -0/+2 |
| | | | | | | | | | current head UHD code. Apparently operation is "flawless" but more regression and corner case regression could and should be done. Tristate drivers have been added at the top level of the hierarchy for the SRAM databus as is considered good practice for both Xilinx and ASIC design flows and so both top level and core fils have been touched. | ||||
| * | produces good bin files | Matt Ettus | 2010-06-11 | 1 | -6/+10 |
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| * | first attempt at cleaning up the build system | Matt Ettus | 2010-06-10 | 1 | -206/+32 |
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| * | move u2_core into u2_rev3 directory to simplify directory structure and save ↵ | Matt Ettus | 2010-06-08 | 1 | -1/+1 |
| | | | | | headaches | ||||
| * | report ise version in build | Matt Ettus | 2010-06-07 | 1 | -1/+1 |
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| * | from UDP branch, changed names because I want these separate from the ↵ | Matt Ettus | 2010-05-27 | 1 | -0/+267 |
| non-udp versions | |||||
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index : uhd | |
| Ettus' UHD Repository |
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