Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | first cut at making a bidirectional 2 port ram for the gpmc data interface | Matt Ettus | 2010-02-23 | 1 | -0/+1 |
* | use our fancy new debug ports | Matt Ettus | 2010-02-23 | 1 | -0/+3 |
* | settings bus with 16 bit wishbone interface, put on the main wishbone in u1e | Matt Ettus | 2010-02-22 | 2 | -3/+14 |
* | GPIOs now on the wishbone interface | Matt Ettus | 2010-02-22 | 4 | -37/+54 |
* | added gpio control to the wishbone | Matt Ettus | 2010-02-18 | 2 | -11/+14 |
* | Added I2C, UART, debug pins, misc wishbone stuff | Matt Ettus | 2010-02-18 | 3 | -48/+187 |
* | Fixed paths to help icarus find opencores and xilinx models. Added Xilinx gl... | Matt Ettus | 2010-02-18 | 2 | -4/+7 |
* | wishbone bridge now with minimal functionality. Need to check | Matt Ettus | 2010-02-16 | 6 | -9/+49 |
* | first cut at gpmc <-> wb bridge, split u1e into core, top, and tb | Matt Ettus | 2010-02-16 | 5 | -34/+93 |
* | copied over from safe_u1e | Matt Ettus | 2010-02-16 | 4 | -0/+553 |