| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | minor changes to get it to synthesize | Matt Ettus | 2010-04-13 | 1 | -0/+3 |
| * | added 16-bit wide atr controller | Matt Ettus | 2010-04-01 | 1 | -1/+1 |
| * | connect up the 16 bit spi core | Matt Ettus | 2010-03-26 | 1 | -2/+1 |
| * | point to the new files | Matt Ettus | 2010-02-25 | 1 | -0/+2 |
| * | first cut at making a bidirectional 2 port ram for the gpmc data interface | Matt Ettus | 2010-02-23 | 1 | -0/+1 |
| * | settings bus with 16 bit wishbone interface, put on the main wishbone in u1e | Matt Ettus | 2010-02-22 | 1 | -1/+1 |
| * | GPIOs now on the wishbone interface | Matt Ettus | 2010-02-22 | 1 | -1/+1 |
| * | first cut at gpmc <-> wb bridge, split u1e into core, top, and tb | Matt Ettus | 2010-02-16 | 1 | -1/+2 |
| * | copied over from safe_u1e | Matt Ettus | 2010-02-16 | 1 | -0/+246 |
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