| Commit message (Expand) | Author | Age | Files | Lines |
* | fpga: fix custom defs in some top level makefiles | Josh Blum | 2012-03-08 | 2 | -2/+2 |
* | dsp rework: implement 64 bit ticks no seconds | Josh Blum | 2012-02-06 | 1 | -1/+1 |
* | dsp rework: pass vita clears into dsp modules, unified fifo clears | Josh Blum | 2012-02-04 | 1 | -22/+18 |
* | dsp rework: rehash of the custom module stuff and readme | Josh Blum | 2012-02-02 | 3 | -7/+15 |
* | dsp rework: custom engine module for rx/tx vita chain | Josh Blum | 2012-02-01 | 1 | -2/+5 |
* | dsp rework: added double buffer interface to vita tx | Josh Blum | 2012-01-28 | 1 | -1/+1 |
* | dsp rework: moved scale and round into ddc chain | Josh Blum | 2012-01-28 | 1 | -1/+1 |
* | dsp rework: top level fixes B100/E100 | Josh Blum | 2012-01-27 | 2 | -4/+5 |
* | dsp rework: integrated custom dsp module shells | Josh Blum | 2012-01-27 | 3 | -6/+10 |
* | dsp rework: implemented dsp changes for other top levels | Josh Blum | 2012-01-27 | 1 | -17/+33 |
* | dsp rework: u2_core test implementation | Josh Blum | 2012-01-26 | 1 | -2/+2 |
* | need more umph out of correction values | Josh Blum | 2011-11-10 | 1 | -1/+1 |
* | convenience makefiles for top level projects | Josh Blum | 2011-11-05 | 1 | -0/+17 |
* | increase vita rx fifosize to 10, like USRP2, make things work | Josh Blum | 2011-11-04 | 1 | -2/+2 |
* | u1e: fix unattached nets from copy-paste error | Matt Ettus | 2011-11-04 | 1 | -3/+3 |
* | u1e/u1p: GPIOs switched over to setting regs | Matt Ettus | 2011-10-27 | 1 | -21/+26 |
* | 32 bit compat number for E and B series | Josh Blum | 2011-10-26 | 1 | -5/+4 |
* | u1e/u1p: removed led setting reg | Matt Ettus | 2011-10-26 | 1 | -7/+2 |
* | u1p/u1e: partially redone atr and gpio redo | Matt Ettus | 2011-10-26 | 1 | -11/+2 |
* | u1e/u1p: remove unused UART | Matt Ettus | 2011-10-26 | 1 | -11/+0 |
* | connect and map b100 and e100 front-panel leds | Josh Blum | 2011-10-11 | 1 | -1/+1 |
* | E100: GPSDO serial port level conversion | Nick Foster | 2011-09-28 | 2 | -2/+9 |
* | u1e,u1p: turn off debug pins, misc cleanups | Matt Ettus | 2011-09-08 | 1 | -21/+4 |
* | u1e: relax GPMC constraints, eases P&R | Matt Ettus | 2011-09-02 | 1 | -10/+10 |
* | u1e: separate build for E100 and E110, just a different FPGA | Matt Ettus | 2011-09-01 | 2 | -1/+102 |
* | e100: squashed work on bus implementation on GPMC | Josh Blum | 2011-08-29 | 3 | -42/+24 |
* | e100: continuation of the atr fix to get e100 to build | Josh Blum | 2011-08-15 | 1 | -2/+2 |
* | B100/E100: fix ATR RX mode pins not connected | Nick Foster | 2011-08-10 | 1 | -2/+2 |
* | appease the ISE gods | Matt Ettus | 2011-07-19 | 1 | -0/+1 |
* | e100: proc_int should be high when interrupted | Josh Blum | 2011-06-20 | 1 | -3/+1 |
* | e100: added proc_int and buffer for async messages | Josh Blum | 2011-06-19 | 2 | -17/+49 |
* | u1e: core compile now works as a fullchip lint | Matt Ettus | 2011-06-16 | 1 | -1/+1 |
* | u1p/u1e: cleanup some warnings, connect the correct clocks | Matt Ettus | 2011-06-16 | 1 | -3/+3 |
* | Merge branch 'usrp_e100_aux_spi' into dsp_rebase | Matt Ettus | 2011-06-15 | 5 | -156/+24 |
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| * | usrp-e100: removed passthrough files, not needed w/ aux spi for clock chip | Josh Blum | 2011-06-09 | 3 | -139/+0 |
| * | usrp-e100: make reg_test32 persistent across resets, bump compat number | Josh Blum | 2011-06-08 | 1 | -2/+3 |
| * | usrp-e100: work on aux spi | Josh Blum | 2011-06-08 | 2 | -17/+22 |
* | | u1e/u1p: new register map for new dsp | Matt Ettus | 2011-06-15 | 1 | -13/+16 |
* | | u1p: work in dual rx and frontend from u1e | Matt Ettus | 2011-06-14 | 1 | -3/+1 |
* | | u1e-dsp: attach tx dc offset and iq balance | Matt Ettus | 2011-06-14 | 1 | -6/+9 |
* | | u1e: update u1e to use new rx_frontend, and give it a 2nd rx dsp core | Matt Ettus | 2011-06-08 | 1 | -21/+74 |
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* | added copyrights | Josh Blum | 2011-06-07 | 4 | -0/+68 |
* | lots of renaming and moving around of toplevel directories to reflect product... | Matt Ettus | 2011-06-07 | 14 | -0/+1137 |