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* E100: GPSDO serial port level conversionNick Foster2011-09-282-2/+9
* u1e,u1p: turn off debug pins, misc cleanupsMatt Ettus2011-09-081-21/+4
* u1e: relax GPMC constraints, eases P&RMatt Ettus2011-09-021-10/+10
* u1e: separate build for E100 and E110, just a different FPGAMatt Ettus2011-09-012-1/+102
* e100: squashed work on bus implementation on GPMCJosh Blum2011-08-293-42/+24
* e100: continuation of the atr fix to get e100 to buildJosh Blum2011-08-151-2/+2
* B100/E100: fix ATR RX mode pins not connectedNick Foster2011-08-101-2/+2
* appease the ISE godsMatt Ettus2011-07-191-0/+1
* e100: proc_int should be high when interruptedJosh Blum2011-06-201-3/+1
* e100: added proc_int and buffer for async messagesJosh Blum2011-06-192-17/+49
* u1e: core compile now works as a fullchip lintMatt Ettus2011-06-161-1/+1
* u1p/u1e: cleanup some warnings, connect the correct clocksMatt Ettus2011-06-161-3/+3
* Merge branch 'usrp_e100_aux_spi' into dsp_rebaseMatt Ettus2011-06-155-156/+24
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| * usrp-e100: removed passthrough files, not needed w/ aux spi for clock chipJosh Blum2011-06-093-139/+0
| * usrp-e100: make reg_test32 persistent across resets, bump compat numberJosh Blum2011-06-081-2/+3
| * usrp-e100: work on aux spiJosh Blum2011-06-082-17/+22
* | u1e/u1p: new register map for new dspMatt Ettus2011-06-151-13/+16
* | u1p: work in dual rx and frontend from u1eMatt Ettus2011-06-141-3/+1
* | u1e-dsp: attach tx dc offset and iq balanceMatt Ettus2011-06-141-6/+9
* | u1e: update u1e to use new rx_frontend, and give it a 2nd rx dsp coreMatt Ettus2011-06-081-21/+74
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* added copyrightsJosh Blum2011-06-074-0/+68
* lots of renaming and moving around of toplevel directories to reflect product...Matt Ettus2011-06-0714-0/+1137