uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	vita: moved clear register to overlap with nchan register	Josh Blum	2012-04-09	1	-1/+1
\| \| \| \| \| \| \| \| \| \| \| \|	This fixes the bug where setting the format clears the vita RX. This is only an issue when the noclear option is set by UHD, because the format register is always so, so it always clears. Note: noclear is there to support the backwards compat API (pre streamer). Now, numchans and clear overlap. This is ok because in the host code, clear and numchans are always used together. All timing meets on N2xx and USRP2.
*	b100: fix slave fifo data xfer exit condition	Josh Blum	2012-04-01	1	-1/+1
\| \| \| \| \| \| \|	When exiting the read/write data state, when the transfer count maxes out/peaks, the fifo read/write signals were getting this condition the cycle after with the state change.
*	b100: slave fifo fix for dst/src ready signals	Josh Blum	2012-03-24	1	-1/+1
\| \| \| \| \| \| \| \|	Some of the changes my be overkill, but the idea is to be more careful about allowing FIFO IO to occur on transitions. The cal app was able to complete successfully.
*	fpga: force -include_global for custom sources	Josh Blum	2012-03-12	1	-1/+1
\| \| \| \| \| \| \| \|	ISE will not recognize custom sources as part of the hierarchy, and thus will not compile (unless its the first macro...). Remove custom sources from the source list, and specially add them with the -include_global option.
*	fpga: fix custom defs in some top level makefiles	Josh Blum	2012-03-08	2	-99/+1
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*	dsp rework: implement 64 bit ticks no seconds	Josh Blum	2012-02-06	1	-1/+1
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*	B100: External FPGA reset from FX2 reuses fpga_cfg_cclk.	Nick Foster	2012-02-06	2	-2/+6
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*	dsp rework: pass vita clears into dsp modules, unified fifo clears	Josh Blum	2012-02-04	1	-22/+17
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*	b100: timing constraints on GPIF lines	Josh Blum	2012-02-04	1	-0/+9
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*	b100: connect all clears for gpif	Josh Blum	2012-02-03	1	-1/+1
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*	dsp rework: rehash of the custom module stuff and readme	Josh Blum	2012-02-02	2	-6/+13
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*	dsp rework: custom engine module for rx/tx vita chain	Josh Blum	2012-02-01	1	-3/+6
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*	Merge branch 'slave_fifo_rebase' into dsp_rework	Josh Blum	2012-02-01	3	-20/+27
\|\ \| \| \| \| \| \| \| \|	Conflicts: usrp2/top/B100/u1plus_core.v
\| *	Fix missing B100 core_compile (poor Git hygeine)	Nick Foster	2012-01-23	1	-0/+1
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\| *	b100: bumped fpga compat number for slave fifo mode	Josh Blum	2012-01-12	1	-1/+1
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\| *	B100: moar buffering on TX for better performance in bidirectional applications	Nick Foster	2012-01-12	1	-2/+2
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\| *	Squashed slave mode changes onto master.	Nick Foster	2012-01-12	4	-19/+25
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* \|	dsp rework: added double buffer interface to vita tx	Josh Blum	2012-01-28	1	-1/+1
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* \|	dsp rework: moved scale and round into ddc chain	Josh Blum	2012-01-28	1	-1/+1
\| \| \| \| \| \| \| \|	16to8 engine now performs only a clip from 16->8
* \|	dsp rework: top level fixes B100/E100	Josh Blum	2012-01-27	2	-4/+4
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* \|	dsp rework: integrated custom dsp module shells	Josh Blum	2012-01-27	2	-5/+9
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* \|	dsp rework: implemented dsp changes for other top levels	Josh Blum	2012-01-27	1	-18/+34
\| \| \| \| \| \| \| \|	added user registers into each toplevel (not used yet)
* \|	dsp rework: u2_core test implementation	Josh Blum	2012-01-26	1	-2/+2
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*	need more umph out of correction values	Josh Blum	2011-11-10	1	-1/+1
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*	convenience makefiles for top level projects	Josh Blum	2011-11-05	1	-0/+14
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*	increase vita rx fifosize to 10, like USRP2, make things work	Josh Blum	2011-11-04	1	-2/+2
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*	b100: fix warnings, complete removal of test code	Matt Ettus	2011-11-04	1	-16/+4
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*	u1e/u1p: GPIOs switched over to setting regs	Matt Ettus	2011-10-27	1	-11/+19
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*	32 bit compat number for E and B series	Josh Blum	2011-10-26	1	-5/+4
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*	u1e/u1p: removed led setting reg	Matt Ettus	2011-10-26	1	-7/+2
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*	u1p/u1e: partially redone atr and gpio redo	Matt Ettus	2011-10-26	1	-22/+9
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*	u1e/u1p: remove unused UART	Matt Ettus	2011-10-26	1	-13/+0
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*	connect and map b100 and e100 front-panel leds	Josh Blum	2011-10-11	1	-1/+1
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*	B100: use gpif_misc on R2 hw, invert direction of gpif_misc pins	Nick Foster	2011-09-19	1	-2/+2
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*	u1e,u1p: turn off debug pins, misc cleanups	Matt Ettus	2011-09-08	1	-5/+6
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*	u1p: proper format in ucf file	Matt Ettus	2011-09-08	5	-4/+474
\| \| \| \|	u1p: build separate u1plus (prototypes) and B100 (release)
*	b100: gpif_rst resynced to gpif_clk	Matt Ettus	2011-08-26	1	-1/+1
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*	B100/E100: fix ATR RX mode pins not connected	Nick Foster	2011-08-10	1	-2/+2
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*	appease the ISE gods	Matt Ettus	2011-07-19	1	-0/+1
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*	b100: fix for fpga syntax error on xfer_rate	Josh Blum	2011-07-19	1	-1/+1
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*	u1p: remove uart and bus testing to fit easier	Matt Ettus	2011-06-16	1	-8/+9
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*	u1p: remove unused ports	Matt Ettus	2011-06-16	1	-1/+0
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*	u1p/u1e: cleanup some warnings, connect the correct clocks	Matt Ettus	2011-06-16	1	-8/+7
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*	u1e/u1p: new register map for new dsp	Matt Ettus	2011-06-15	1	-13/+16
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*	u1p: work in dual rx and frontend from u1e	Matt Ettus	2011-06-14	1	-13/+60
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*	u1p: new tx dsp frontend, copied from u1e	Matt Ettus	2011-06-14	1	-10/+17
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*	added copyrights	Josh Blum	2011-06-07	2	-0/+34
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*	lots of renaming and moving around of toplevel directories to reflect ↵	Matt Ettus	2011-06-07	7	-0/+855
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