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* time: register time output to help fpga timingMatt Ettus2011-07-281-2/+5
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* time64: reverted mimo sync changes to time64Josh Blum2011-07-281-3/+1
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* u2/u2p: speed up time_64, and remove readbacks on simple_gemac wb regsMatt Ettus2011-07-281-1/+3
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* u2/u2p: further qualify the serdes link lightMatt Ettus2011-07-211-0/+7
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* added copyrightsJosh Blum2011-06-078-0/+136
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* processor can read back vita_time at last ppsMatt Ettus2010-12-301-1/+7
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* gyrations to get it to meet timingMatt Ettus2010-12-291-13/+23
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* time sync on usrp2 as well, added debug pins to time sync.Matt Ettus2010-12-101-1/+5
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* slave side can now syncMatt Ettus2010-12-102-13/+33
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* Only do udp now, renamed old ports to exp_time_*Matt Ettus2010-12-091-2/+2
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* reimplemented mimo time transfer to handle 64 bits. Still needsMatt Ettus2010-12-094-70/+162
| | | | to sync on the received side.
* simplify time comparison to speed up logic and meet fpga timingMatt Ettus2010-11-131-1/+25
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* first attempt at cleaning up the build systemMatt Ettus2010-06-101-0/+16
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* allow other clock rates in vita timeMatt Ettus2010-06-081-13/+15
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* copied over from quad radioMatt Ettus2010-02-081-0/+60
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* Merge commit '8d19387a8642caf74179bdcb7eddf1936f473e53' into udpMatt Ettus2010-01-251-5/+12
| | | | | | | | Merge latest VRT changes into UDP branch. Merged from 1 behind the head of VRT because the head moved things around and confused git Conflicts: usrp2/timing/time_64bit.v usrp2/top/u2_core/u2_core.v
* moved into subdirJosh Blum2010-01-228-0/+551