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* simplify time comparison to speed up logic and meet fpga timingMatt Ettus2010-11-131-1/+25
* first attempt at cleaning up the build systemMatt Ettus2010-06-101-0/+16
* allow other clock rates in vita timeMatt Ettus2010-06-081-13/+15
* copied over from quad radioMatt Ettus2010-02-081-0/+60
* Merge commit '8d19387a8642caf74179bdcb7eddf1936f473e53' into udpMatt Ettus2010-01-251-5/+12
* moved into subdirJosh Blum2010-01-228-0/+551