Commit message (Collapse) | Author | Age | Files | Lines | |
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* | u2/u2p: misc connection and compilation fixes | Matt Ettus | 2011-06-08 | 3 | -18/+20 |
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* | unused nets | Matt Ettus | 2011-06-08 | 1 | -1/+0 |
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* | u2/u2p: pull IQ balance and dcoffset out of dsp_core, put in frontend module | Matt Ettus | 2011-06-08 | 3 | -42/+78 |
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* | redone DC offset with sigma-delta quantization | Matt Ettus | 2011-06-08 | 5 | -27/+80 |
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* | added copyrights | Josh Blum | 2011-06-07 | 38 | -0/+646 |
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* | clean up a bunch of warnings and incorrect bus widths | Matt Ettus | 2011-03-16 | 1 | -21/+5 |
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* | Clean up iq swapping on RX. It is now swapped in the top level. | Matt Ettus | 2010-08-25 | 1 | -22/+13 |
| | | | | widened muxes to 4 bits to match tx side and handle more ADCs in future | ||||
* | remove warnings | Matt Ettus | 2010-07-16 | 1 | -2/+2 |
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* | first attempt at cleaning up the build system | Matt Ettus | 2010-06-10 | 3 | -8/+228 |
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* | from UDP branch, changed names because I want these separate from the ↵ | Matt Ettus | 2010-05-27 | 1 | -0/+183 |
| | | | | non-udp versions | ||||
* | Merge branch 'udp' into master_merge_take2 | Matt Ettus | 2010-05-27 | 1 | -6/+5 |
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * udp: (67 commits) better test program for just the tx side fix typo, no functionality difference ignores move dsp settings regs to reclocked setting bus. Works, gets us to within 18ps of passing timing reverting logic clean up which should have made timing better, but made it worse instead moved fifos around, now easier to see where they are and how big bigger fifo on UDP TX path, to possibly fix overruns on decim=4 Xilinx ISE is incorrectly parsing the verilog case statement, this is a workaround pps and vita time debug pins ignore emacs backup files more debug for fixing E's better debug pins for going after cascading E's copy in wrong place copied over from quad radio just debug pin changes typo caused the tx udp chain to be disconnected moved into subdir speed up timing by ignoring the too_early error. We'll need to FIXME this later Added set time and set time at next pps. Removed the old sync pps commands, they dont make sense to use anymore. moved around regs, added a bit to allow for alternate PPS source ... | ||||
| * | Merge branch 'corgan_fixes' into udp_corgan | Matt Ettus | 2010-04-26 | 2 | -27/+31 |
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| * | moved into subdir | Josh Blum | 2010-01-22 | 64 | -0/+5130 |
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* | Remove some warnings in dsp_core_rx | Johnathan Corgan | 2010-02-23 | 1 | -3/+7 |
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* | Change bit width of CORDIC constants to remove meaningless warning | Johnathan Corgan | 2010-02-23 | 1 | -24/+24 |
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* | Moved usrp2 fpga files into usrp2 subdir. | Josh Blum | 2010-01-22 | 64 | -0/+5131 |