uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	added copyrights	Josh Blum	2011-06-07	14	-0/+238
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*	u1p: use icarus verilog to find warnings	Matt Ettus	2011-05-26	1	-0/+4575
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*	u1e: get dsp_framer36 from u1p so it can skip the protocol header	Matt Ettus	2011-05-09	1	-0/+83
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*	get it to build	Matt Ettus	2010-11-11	1	-0/+301
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*	async seems to work with packet lengths now. Still need to do wishbone regs ↵	Matt Ettus	2010-04-15	1	-12/+34
\| \| \| \|	for gpmc
*	change time parameters because Xilinx IP has a 1ps timescale	Matt Ettus	2010-04-15	1	-14/+27
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*	synchronous and asynchronous gpmc models	Matt Ettus	2010-04-15	2	-2/+99
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*	lengthened delay between cycles, added more transactions on the data bus	Matt Ettus	2010-04-12	1	-2/+7
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*	loopback and test	Matt Ettus	2010-02-25	1	-5/+6
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*	First cut at passing data buffers around on GPMC bus	Matt Ettus	2010-02-25	1	-4/+19
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*	speed up the presentation of registered wb data to the gpmc	Matt Ettus	2010-02-17	1	-11/+15
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*	wishbone bridge now with minimal functionality. Need to check	Matt Ettus	2010-02-16	1	-0/+70
\| \| \| \|	timing and handle wait states.
*	Moved usrp2 fpga files into usrp2 subdir.	Josh Blum	2010-01-22	20	-0/+8493