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* have_space and have_packet now stay high even while busy,Matt Ettus2010-05-033-4/+6
| | | | | | | as long as there really is more data/space. This should allow bursting without having additional interrupts. Also lenghten RX FIFO
* Only allow new packets if we can fit the largest possible packet (2KB)Matt Ettus2010-04-231-1/+1
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* Register outputs to omap to prevent runt pulses from falsely triggering ↵Matt Ettus2010-04-233-7/+20
| | | | interrupts
* access frame length regs from wishboneMatt Ettus2010-04-151-4/+4
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* async seems to work with packet lengths now. Still need to do wishbone regs ↵Matt Ettus2010-04-153-22/+35
| | | | for gpmc
* async gpmc progressMatt Ettus2010-04-152-0/+153
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* add bus error reportingMatt Ettus2010-04-151-3/+9
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* correct name of moduleMatt Ettus2010-04-151-2/+2
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* progress on synchronous gpmc, but it may not be possible due to the limited ↵Matt Ettus2010-04-153-43/+45
| | | | number of clock edges
* handle all tri-state in the top level of gpmcMatt Ettus2010-04-152-6/+6
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* more sync progress. This is just a skeleton for now, with junk contentMatt Ettus2010-04-141-0/+56
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* more progress on synchronous interfaceMatt Ettus2010-04-143-26/+94
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* renamed to async. Will be building a sync version for GPMC_CLKMatt Ettus2010-04-141-2/+2
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* make timing diagrams for bus transactions. Still need to do readsMatt Ettus2010-04-145-0/+46
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* probably won't be using this, and it hasn't been testedMatt Ettus2010-04-141-0/+46
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* minor changes to get it to synthesizeMatt Ettus2010-04-131-1/+1
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* replaced ram interface with a fifo interface. still need to do rx sideMatt Ettus2010-04-122-81/+110
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* split out gpmc to wishbone interface to make gpmc top level cleanerMatt Ettus2010-04-121-0/+57
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* gpmc debug pinsMatt Ettus2010-02-251-1/+8
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* fix syntax error which icarus allowed (filed a bug with them)Matt Ettus2010-02-251-7/+9
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* corrected logicMatt Ettus2010-02-251-17/+7
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* edge sync on done signals so we only fill/empty one bufferMatt Ettus2010-02-252-2/+32
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* First cut at passing data buffers around on GPMC busMatt Ettus2010-02-252-11/+122
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* first cut at making a bidirectional 2 port ram for the gpmc data interfaceMatt Ettus2010-02-231-6/+18
| | | | ISE chokes on the unequal size ram
* speed up the presentation of registered wb data to the gpmcMatt Ettus2010-02-171-2/+5
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* wishbone bridge now with minimal functionality. Need to checkMatt Ettus2010-02-161-2/+2
| | | | timing and handle wait states.
* first cut at gpmc <-> wb bridge, split u1e into core, top, and tbMatt Ettus2010-02-161-0/+66
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