| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | replaced ram interface with a fifo interface. still need to do rx side | Matt Ettus | 2010-04-12 | 1 | -81/+52 |
| * | gpmc debug pins | Matt Ettus | 2010-02-25 | 1 | -1/+8 |
| * | edge sync on done signals so we only fill/empty one buffer | Matt Ettus | 2010-02-25 | 1 | -2/+10 |
| * | First cut at passing data buffers around on GPMC bus | Matt Ettus | 2010-02-25 | 1 | -11/+34 |
| * | first cut at making a bidirectional 2 port ram for the gpmc data interface | Matt Ettus | 2010-02-23 | 1 | -6/+18 |
| * | speed up the presentation of registered wb data to the gpmc | Matt Ettus | 2010-02-17 | 1 | -2/+5 |
| * | wishbone bridge now with minimal functionality. Need to check | Matt Ettus | 2010-02-16 | 1 | -2/+2 |
| * | first cut at gpmc <-> wb bridge, split u1e into core, top, and tb | Matt Ettus | 2010-02-16 | 1 | -0/+66 |
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