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* all: removed old unused fifosMatt Ettus2011-03-032-21/+1
* all: short fifos on front and back of fifo36_to_fifo19Matt Ettus2011-03-031-15/+33
* u2/u2p: shortfifos in fifo36_to_ll8, no more _n junkMatt Ettus2011-03-031-28/+43
* u2/u2p: rxdsp/cpu/err muxing now prioritizes cpu and err over rxdspMatt Ettus2011-03-031-7/+10
* u2/u2p: switch over to 36 bit wide ethernet wrapperMatt Ettus2011-03-031-27/+47
* ethfifo_reorg: switch buffer int2 lastline to work as a length parameterJosh Blum2011-03-031-5/+6
* u2/u2p: get rid of redeclarationMatt Ettus2011-03-031-1/+0
* u2/u2p: ll8 now all active high, removed extra shortfifo from eth wrapperMatt Ettus2011-03-031-8/+6
* u2/u2p: short fifos put on both sides of ll8_to_fifo19Matt Ettus2011-03-031-27/+44
* u2/u2p: inserted short fifo into the packet inspector path to help routing an...Matt Ettus2011-02-171-1/+13
* added port_sel param to dsp framerJosh Blum2011-02-172-4/+5
* packet_router: added support for two dsps into routerJosh Blum2011-02-151-14/+20
* believed to fix fifo swizzling with partially empty linesMatt Ettus2011-01-213-25/+114
* xbar and valve: fix switching delayed by active signalJosh Blum2011-01-112-9/+12
* packet_router: tweak mode SR (its only 1 bit)Josh Blum2011-01-071-3/+2
* usrp2: removed unused changed signal for mode selectionJosh Blum2010-12-291-2/+1
* packet_router: replace buffers interfaced in packet router with buffer_int2Josh Blum2010-12-283-163/+25
* now uses 2 rams, one for read, one for writeMatt Ettus2010-12-281-89/+97
* reformattingMatt Ettus2010-12-281-5/+1
* first cut at new buffer interface for CPU. Like old buffer_int plusMatt Ettus2010-12-281-0/+169
* unused lineMatt Ettus2010-12-281-1/+0
* packet_router: use the mode register to reset hs control and cpu smsJosh Blum2010-12-271-22/+13
* packet_router: all non ip/udp should also go to bothJosh Blum2010-12-131-7/+5
* packet_router: harmless logic tweaksJosh Blum2010-12-122-11/+8
* packet_router: reverted enable change to dsp framer, it was already correctJosh Blum2010-12-121-2/+1
* packet_router: raise enable for bram reads the cycle before as wellJosh Blum2010-12-112-2/+4
* packet_router: added fifo before cpu_out, tweaked inspection logicJosh Blum2010-12-101-25/+29
* packet_router: gave the inspector a 4th output which is CPU onlyJosh Blum2010-12-101-83/+123
* packet_router: added status readback for mode, incremented compat numberJosh Blum2010-11-241-0/+1
* packet_router: split the control register into misc, cpu hs out, cpu hs inpJosh Blum2010-11-241-10/+24
* packet_router: modification for sequence number and vrt header offsetJosh Blum2010-11-231-1/+1
* packet_router: it makes more sense to connect the control flags this way nowJosh Blum2010-11-231-13/+6
* packet_router: program the dsp udp port and ip addr through setting registersJosh Blum2010-11-231-31/+33
* packet_router: mux the crossbar input after the protocol framerJosh Blum2010-11-231-2/+12
* packet_router: moved udp tx proto machine into packet router, replaced udp_wr...Josh Blum2010-11-231-2/+42
* packet_router: moved dsp framer into a module, added clr to splitter and renamedJosh Blum2010-11-234-93/+110
* packet_router: implemented crossbar and valve module, moved sreg into router ...Josh Blum2010-11-232-45/+65
* packet valve. will drop incoming data if shut off.Matt Ettus2010-11-231-0/+28
* abstract out the crossbar functionalityMatt Ettus2010-11-231-0/+40
* packet_router: transplanted the async error interface, its now sent into the ...Josh Blum2010-11-231-7/+16
* packet_router: added a way to program in the ip and mac addrs, and added insp...Josh Blum2010-11-231-2/+17
* packet_router: fixed sof bug for cpu (== 1), some logic tweaks, added debugJosh Blum2010-11-231-9/+41
* packet_router: registered control flags, added clear to all state machinesJosh Blum2010-11-231-12/+22
* packet_router: added splitter and mux for slow path stuff (also fixed typo in...Josh Blum2010-11-232-10/+95
* packet_router: renamed inspector output signals and connected (for now) to cp...Josh Blum2010-11-232-22/+52
* packet_router: use BRAM enables to perform pipelined readsJosh Blum2010-11-231-26/+21
* packet_router: use control register bit for master mode flagJosh Blum2010-11-231-2/+1
* packet_router: swapped comm mux for a crossbar, serdes crossbar out now muxed...Josh Blum2010-11-231-27/+62
* packet_router: used registered valid signal for BRAM read cycle delayJosh Blum2010-11-231-16/+15
* packet_router: created dsp framer for rx pathJosh Blum2010-11-231-6/+100