| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Corrected extfifo code so that all registers that are on SRAM signals are pac... | ianb | 2010-08-25 | 3 | -9/+17 |
| * | capacity logic fix | Matt Ettus | 2010-08-19 | 1 | -1/+1 |
| * | Added capacity to the module pinout | Ian Buckley | 2010-08-19 | 1 | -3/+4 |
| * | Added a bunch of debug signals. | Ian Buckley | 2010-08-19 | 2 | -3/+12 |
| * | Regenerated FIFO with lower trigger level for almost full flag to reflect log... | Ian Buckley | 2010-08-19 | 3 | -226/+102 |
| * | Edited FIFO instance to delete port that was not regenerated after reconfigur... | Ian Buckley | 2010-08-12 | 1 | -1/+0 |
| * | Found bug due to not accounting for the correct number of possible in flight ... | Ian Buckley | 2010-08-12 | 3 | -10/+60 |
| * | External FIFO tested in simulation and on USRP2 from decimation 64->8 with cu... | Ian Buckley | 2010-07-31 | 9 | -79/+7073 |
| * | Checkpoint checkin. | Ian Buckley | 2010-07-29 | 9 | -0/+1013 |
| * | get it to build | Matt Ettus | 2010-07-14 | 4 | -5/+8 |
| * | moved forward from the old branch | Matt Ettus | 2010-07-14 | 6 | -0/+846 |
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