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* gray code address for emiMatt Ettus2010-11-111-1/+7
* fifo randomizer for emiMatt Ettus2010-11-115-4/+108
* 1) Created new FIFO IP in Coregen. 512x36 dual clcok FIFO with programable fu...Ian Buckley2010-11-111-11/+11
* 1) u2p has added a new signal from the SRAM to the pinout, RAM_ZZIan Buckley2010-11-112-9/+12
* Added external RAM FIFO to u2plus.Ian Buckley2010-11-114-90/+169
* Enhanced test bench to be more like real world applicationIan Buckley2010-11-112-7/+14
* Corrected extfifo code so that all registers that are on SRAM signals are pac...ianb2010-11-113-9/+17
* capacity logic fixMatt Ettus2010-11-111-1/+1
* Added capacity to the module pinoutIan Buckley2010-11-111-3/+4
* Added a bunch of debug signals.Ian Buckley2010-11-112-3/+12
* Regenerated FIFO with lower trigger level for almost full flag to reflect log...Ian Buckley2010-11-113-226/+102
* Edited FIFO instance to delete port that was not regenerated after reconfigur...Ian Buckley2010-11-111-1/+0
* Found bug due to not accounting for the correct number of possible in flight ...Ian Buckley2010-11-113-10/+60
* External FIFO tested in simulation and on USRP2 from decimation 64->8 with cu...Ian Buckley2010-11-119-79/+7073
* Checkpoint checkin.Ian Buckley2010-11-119-0/+1013
* get it to buildMatt Ettus2010-11-114-5/+8
* moved forward from the old branchMatt Ettus2010-11-116-0/+846