| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Added external RAM FIFO to u2plus. | Ian Buckley | 2010-11-11 | 1 | -0/+0 |
| | | | | | | | | | | | Added code branch to ext_fifo.v using generate that instantiates different input and out fifo's and touched nobl_fifo code so that it works at 18 and 36bit widths. Added 2nd DCM to top level to generate off chip RAMCLK. Added explicit I/O instances to top level for tristate drivers and changed signals to core as needed. Creted new FIFO's in core gen to replace much larger FIFO's used on u2rev3 | ||||
| * | Enhanced test bench to be more like real world application | Ian Buckley | 2010-11-11 | 1 | -1/+2 |
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| * | Checkpoint checkin. | Ian Buckley | 2010-11-11 | 1 | -0/+1 |
| Loopback is running via the external ZBT SRAM...HOWEVER, its not running well, its stable but the data is corrupted sometimes. Not clear if its a logic or AC timing/SI issue yet. | |||||
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