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* Merge branch 'master' into udpMatt Ettus2010-05-181-2/+4
|\ | | | | | | | | | | | | | | Remove CVS files, warning removal on setting reg width, aeMB synthesis pragmas Conflicts: usrp2/control_lib/setting_reg.v usrp2/top/u2_core/u2_core.v usrp2/top/u2_rev3/Makefile
| * added width parameter to avoid warnings (thanks IJB) and default value parameterMatt Ettus2010-05-181-3/+5
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| * revert commit 9899b81f920 which should have improved timing but didn'tMatt Ettus2010-05-131-5/+13
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* | reverting logic clean up which should have made timing better, but made it ↵Matt Ettus2010-05-111-5/+12
| | | | | | | | worse instead
* | Merge branch 'master' into udpMatt Ettus2010-05-112-13/+25
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| * cleaned up the logic, this is copied over from quad radioMatt Ettus2010-05-111-13/+5
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| * allow settings bus to cross to a new clock domain, should help timing, but ↵Matt Ettus2010-05-111-0/+20
| | | | | | | | not attached yet
* | Merge branch 'corgan_fixes' into udp_corganMatt Ettus2010-04-261-1/+1
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| * Merge commit 'upstream/master'Johnathan Corgan2010-03-091-1/+1
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| * | Fix missing item on sensitivity listJohnathan Corgan2010-02-231-1/+1
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* | | Merge branch 'master' into udpMatt Ettus2010-03-251-1/+1
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| * | proper initialization of the ramMatt Ettus2010-02-231-1/+1
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| * Moved usrp2 fpga files into usrp2 subdir.Josh Blum2010-01-2276-0/+11382
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* moved into subdirJosh Blum2010-01-2276-0/+11383