uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
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\| * \| \| \| \| \| \| \|	first cut at making a bidirectional 2 port ram for the gpmc data interface	Matt Ettus	2010-02-23	1	-0/+44
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	ISE chokes on the unequal size ram
\| * \| \| \| \| \| \| \|	settings bus with 16 bit wishbone interface, put on the main wishbone in u1e	Matt Ettus	2010-02-22	1	-0/+54
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\| * \| \| \| \| \| \| \|	Modified nsgpio.v to support 16 bit little endian bus interface.	Matt Ettus	2010-02-22	1	-0/+124
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\| * \| \| \| \| \| \| \|	allow default uart clock divider	Matt Ettus	2010-02-18	1	-6/+7
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* \| \| \| \| \| \| \| \|	U2P: remember your semicolons.	Nick Foster	2010-10-07	1	-1/+1
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* \| \| \| \| \| \| \| \|	U2P: modified ICAP. turns out ICAP needs clock disabled while CE is not ↵	Nick Foster	2010-10-07	1	-7/+10
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	asserted. which is the point of a CE, but... it works. Also committed latest bootloader, might not be final version.
* \| \| \| \| \| \| \| \|	quad uart instead of single, for the extra on board serial ports	Matt Ettus	2010-08-11	2	-0/+72
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* \| \| \| \| \| \| \| \|	proper selection of bank of ram for instruction, since the address	Matt Ettus	2010-07-19	1	-1/+5
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	has already incremented by the time the data is returned
* \| \| \| \| \| \| \| \|	reset the ack signal	Matt Ettus	2010-07-13	1	-1/+1
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* \| \| \| \| \| \| \| \|	attach the correct data port	Matt Ettus	2010-07-13	1	-5/+5
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* \| \| \| \| \| \| \| \|	separate boot ram, redone memory map, connected uart	Matt Ettus	2010-07-13	2	-0/+247
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* \| \| \| \| \| \| \| \|	ram_harvard2 is a workaround for a Xilinx bug that gets confused by an ↵	Matt Ettus	2010-07-12	2	-0/+79
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	unused write port on a ram
* \| \| \| \| \| \| \| \|	very slight mods from v5 version	Matt Ettus	2010-07-12	1	-0/+56
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* \| \| \| \| \| \| \| \|	copied from quad radio	Matt Ettus	2010-07-12	1	-0/+54
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* \| \| \| \| \| \| \|	barely fails timing on gigE/10 and gigE/12, larger fail on udp/10, but all	Matt Ettus	2010-06-14	3	-212/+318
\| \|_\|_\|_\|_\|_\|/ \|/\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	seem to work ok
* \| \| \| \| \| \|	first attempt at cleaning up the build system	Matt Ettus	2010-06-10	22	-7528/+44
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* \| \| \| \| \|	Merge branch 'master' into udp	Matt Ettus	2010-05-18	1	-2/+4
\|\ \ \ \ \ \ \| \| \|_\|_\|_\|/ \| \|/\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Remove CVS files, warning removal on setting reg width, aeMB synthesis pragmas Conflicts: usrp2/control_lib/setting_reg.v usrp2/top/u2_core/u2_core.v usrp2/top/u2_rev3/Makefile
\| * \| \| \| \|	added width parameter to avoid warnings (thanks IJB) and default value parameter	Matt Ettus	2010-05-18	1	-3/+5
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\| * \| \| \| \|	revert commit 9899b81f920 which should have improved timing but didn't	Matt Ettus	2010-05-13	1	-5/+13
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* \| \| \| \|	reverting logic clean up which should have made timing better, but made it ↵	Matt Ettus	2010-05-11	1	-5/+12
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	worse instead
* \| \| \| \|	Merge branch 'master' into udp	Matt Ettus	2010-05-11	2	-13/+25
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\| * \| \| \|	cleaned up the logic, this is copied over from quad radio	Matt Ettus	2010-05-11	1	-13/+5
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\| * \| \| \|	allow settings bus to cross to a new clock domain, should help timing, but ↵	Matt Ettus	2010-05-11	1	-0/+20
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	not attached yet
* \| \| \| \|	Merge branch 'corgan_fixes' into udp_corgan	Matt Ettus	2010-04-26	1	-1/+1
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\| * \| \|	Merge commit 'upstream/master'	Johnathan Corgan	2010-03-09	1	-1/+1
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\| * \| \|	Fix missing item on sensitivity list	Johnathan Corgan	2010-02-23	1	-1/+1
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* \| \|	Merge branch 'master' into udp	Matt Ettus	2010-03-25	1	-1/+1
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\| * \|	proper initialization of the ram	Matt Ettus	2010-02-23	1	-1/+1
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\| *	Moved usrp2 fpga files into usrp2 subdir.	Josh Blum	2010-01-22	76	-0/+11382
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*	moved into subdir	Josh Blum	2010-01-22	76	-0/+11383