| Commit message (Expand) | Author | Age | Files | Lines |
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| | * | | | | | | | | allow default uart clock divider | Matt Ettus | 2010-02-18 | 1 | -6/+7 |
| * | | | | | | | | | U2P: remember your semicolons. | Nick Foster | 2010-10-07 | 1 | -1/+1 |
| * | | | | | | | | | U2P: modified ICAP. turns out ICAP needs clock disabled while CE is not asser... | Nick Foster | 2010-10-07 | 1 | -7/+10 |
| * | | | | | | | | | quad uart instead of single, for the extra on board serial ports | Matt Ettus | 2010-08-11 | 2 | -0/+72 |
| * | | | | | | | | | proper selection of bank of ram for instruction, since the address | Matt Ettus | 2010-07-19 | 1 | -1/+5 |
| * | | | | | | | | | reset the ack signal | Matt Ettus | 2010-07-13 | 1 | -1/+1 |
| * | | | | | | | | | attach the correct data port | Matt Ettus | 2010-07-13 | 1 | -5/+5 |
| * | | | | | | | | | separate boot ram, redone memory map, connected uart | Matt Ettus | 2010-07-13 | 2 | -0/+247 |
| * | | | | | | | | | ram_harvard2 is a workaround for a Xilinx bug that gets confused by an unused... | Matt Ettus | 2010-07-12 | 2 | -0/+79 |
| * | | | | | | | | | very slight mods from v5 version | Matt Ettus | 2010-07-12 | 1 | -0/+56 |
| * | | | | | | | | | copied from quad radio | Matt Ettus | 2010-07-12 | 1 | -0/+54 |
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| * | | | | | | | | barely fails timing on gigE/10 and gigE/12, larger fail on udp/10, but all | Matt Ettus | 2010-06-14 | 3 | -212/+318 |
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| * | | | | | | | first attempt at cleaning up the build system | Matt Ettus | 2010-06-10 | 22 | -7528/+44 |
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| * | | | | | | Merge branch 'master' into udp | Matt Ettus | 2010-05-18 | 1 | -2/+4 |
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| | * | | | | | added width parameter to avoid warnings (thanks IJB) and default value parameter | Matt Ettus | 2010-05-18 | 1 | -3/+5 |
| | * | | | | | revert commit 9899b81f920 which should have improved timing but didn't | Matt Ettus | 2010-05-13 | 1 | -5/+13 |
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| * | | | | | reverting logic clean up which should have made timing better, but made it wo... | Matt Ettus | 2010-05-11 | 1 | -5/+12 |
| * | | | | | Merge branch 'master' into udp | Matt Ettus | 2010-05-11 | 2 | -13/+25 |
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| | * | | | | cleaned up the logic, this is copied over from quad radio | Matt Ettus | 2010-05-11 | 1 | -13/+5 |
| | * | | | | allow settings bus to cross to a new clock domain, should help timing, but no... | Matt Ettus | 2010-05-11 | 1 | -0/+20 |
| * | | | | | Merge branch 'corgan_fixes' into udp_corgan | Matt Ettus | 2010-04-26 | 1 | -1/+1 |
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| | * | | | Merge commit 'upstream/master' | Johnathan Corgan | 2010-03-09 | 1 | -1/+1 |
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| | * | | | Fix missing item on sensitivity list | Johnathan Corgan | 2010-02-23 | 1 | -1/+1 |
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| * | | | Merge branch 'master' into udp | Matt Ettus | 2010-03-25 | 1 | -1/+1 |
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| | * | | proper initialization of the ram | Matt Ettus | 2010-02-23 | 1 | -1/+1 |
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| | * | Moved usrp2 fpga files into usrp2 subdir. | Josh Blum | 2010-01-22 | 76 | -0/+11382 |
| * | moved into subdir | Josh Blum | 2010-01-22 | 76 | -0/+11383 |
