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:
uhd
lea-m8f
lea-m8f-003_008_002
lea-m8f-003_009_001
lea-m8f-003_009_004
lea-m8f-003_010_003_000
lea-m8f-003_012_000_000
lea-m8f-v3.14.1.0
lea-m8f-v4.2.0.1
master
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usrp2
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control_lib
Commit message (
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)
Author
Age
Files
Lines
*
test full width packets
Matt Ettus
2010-05-24
1
-0
/
+27
*
fifo36_to_ll8 and fifo pacer need a real fifo between them or they deadlock (...
Matt Ettus
2010-05-21
1
-1
/
+8
*
fix double declaration
Matt Ettus
2010-05-21
1
-1
/
+0
*
send bigger packets to reduce cpu load
Matt Ettus
2010-05-20
1
-1
/
+1
*
combined timed and crc cases. fifo pacer produces/consumes at a fixed rate
Matt Ettus
2010-05-20
1
-0
/
+24
*
moved fifos into gpmc_async, reorganized top level a bit, added in crc packet...
Matt Ettus
2010-05-12
3
-6
/
+48
*
add missing signal from sensitivity list
Matt Ettus
2010-05-12
1
-1
/
+1
*
Merge branch 'master' into u1e
Matt Ettus
2010-05-12
3
-14
/
+26
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*
cleaned up the logic, this is copied over from quad radio
Matt Ettus
2010-05-11
1
-13
/
+5
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*
allow settings bus to cross to a new clock domain, should help timing, but no...
Matt Ettus
2010-05-11
1
-0
/
+20
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*
Merge commit 'upstream/master'
Johnathan Corgan
2010-03-09
1
-1
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+1
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*
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Fix missing item on sensitivity list
Johnathan Corgan
2010-02-23
1
-1
/
+1
*
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packet generator and verifier, to test gpmc and other data transfer stuff
Matt Ettus
2010-05-12
4
-0
/
+153
*
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added 16-bit wide atr controller
Matt Ettus
2010-04-01
3
-14
/
+73
*
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Merge branch 'udp' into u1e
Matt Ettus
2010-03-25
3
-50
/
+51
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*
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Merge branch 'master' into udp
Matt Ettus
2010-03-25
1
-1
/
+1
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*
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moved into subdir
Josh Blum
2010-01-22
76
-0
/
+11383
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/
/
*
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enable was on the wrong address pin, needs to be the highest order one
Matt Ettus
2010-02-25
1
-2
/
+2
*
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Switched xilinx primitives because they order the bits funny in the other one
Matt Ettus
2010-02-25
1
-48
/
+79
*
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ISE chokes on the pure verilog version so we use the macro
Matt Ettus
2010-02-25
1
-4
/
+49
*
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Merge branch 'master' into u1e
Matt Ettus
2010-02-23
1
-1
/
+1
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*
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proper initialization of the ram
Matt Ettus
2010-02-23
1
-1
/
+1
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/
*
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first cut at making a bidirectional 2 port ram for the gpmc data interface
Matt Ettus
2010-02-23
1
-0
/
+44
*
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settings bus with 16 bit wishbone interface, put on the main wishbone in u1e
Matt Ettus
2010-02-22
1
-0
/
+54
*
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Modified nsgpio.v to support 16 bit little endian bus interface.
Matt Ettus
2010-02-22
1
-0
/
+124
*
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allow default uart clock divider
Matt Ettus
2010-02-18
1
-6
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+7
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/
*
Moved usrp2 fpga files into usrp2 subdir.
Josh Blum
2010-01-22
76
-0
/
+11382
