uhd - Ettus' UHD Repository

	Commit message (Expand)	Author	Age	Files	Lines
*	dspengine: insert into the rx chain	Matt Ettus	2011-10-26	1	-0/+2
*	modernize the make files, it now compiles. not tested.	Matt Ettus	2011-05-26	1	-0/+1
*	put these files in the right place. newfifo is long gone.	Matt Ettus	2011-02-16	1	-5/+0
*	usrp-e100: added missing newfifo files to list, added missing signals for timed	Josh Blum	2011-01-26	1	-0/+5
*	usrp-e100: added readback mux 32 as slave 7 for time readback	Josh Blum	2011-01-14	1	-0/+1
*	Merge branch 'u1e' into merge_u1e	Matt Ettus	2010-11-10	1	-0/+3
\|\
\| *	Merge branch 'ise12' into u1e	Matt Ettus	2010-07-19	1	-0/+1
\| \|\
\| * \|	Merge branch 'master' into u1e_newbuild	Matt Ettus	2010-06-14	1	-0/+3
* \| \|	quad uart instead of single, for the extra on board serial ports	Matt Ettus	2010-08-11	1	-0/+1
* \| \|	separate boot ram, redone memory map, connected uart	Matt Ettus	2010-07-13	1	-0/+1
* \| \|	ram_harvard2 is a workaround for a Xilinx bug that gets confused by an unused...	Matt Ettus	2010-07-12	1	-0/+2
\| \|/ \|/\|
* \|	barely fails timing on gigE/10 and gigE/12, larger fail on udp/10, but all	Matt Ettus	2010-06-14	1	-0/+1
\|/
*	first attempt at cleaning up the build system	Matt Ettus	2010-06-10	1	-0/+44