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* tools: typo in x3x0 dpdk fpga_funcverif testmattprost2019-12-171-3/+3
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* tools: update FPGA functional verification tests for X3x0 mcr's & dpdkmattprost2019-11-251-82/+132
| | | | | | | -Added test cases for the 184.32MHz clock rate. -Removed some extra test cases for 200MHz clock rate in order to cut down on test time. -Added DPDK test cases (copied from 10gige and 2x_10gige test cases).
* Docs: Adjust FPGA functional verification testsmichael-west2019-10-151-31/+30
| | | | | | | - Reduce long tests from 3600 seconds to 600 seconds. - Remove 2xRX@153.6e6 test for N310 10 GbE (not practical). Signed-off-by: michael-west <michael.west@ettus.com>
* Python: Added LO source and export arguments to the phase alignment testerickshepherdNI2019-10-101-0/+28
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* python: Fixups for Phase Alignement test scriptBrent Stapleton2019-08-211-12/+34
| | | | | | | | | | | | - Wait 100ms after a retune before capturing samples. Users can set the length of time with `--skip-time X` - Actually set RX gain - Remove old TODOs - Print alignment statistics in increasing frequency order - Fix health check reported values (was reporting radians, but labeling them as deg) - Fix calculating the maximum drift for phase differences around +/-180 degrees
* tools: Add FPGA functional verification tests for N32xAlex Williams2019-01-311-0/+167
| | | | | | | This commit adds FPGA functional verification tests for all the N320 images. The tests follow a similar pattern to N310, but one additional category is present for using the DPDK transport. In order to use that test, the use_dpdk and mgmt_addr args must be specified in the options.
* tools: Make the UHD source gen a plugin for the phase alignment testMartin Braun2019-01-303-11/+118
| | | | | | | This doesn't add any functionality to the phase alignment script, but it does make the siggen portion pluggable. Co-authored-by: Brent Stapleton <brent.stapleton@ettus.com>
* cmake: Update coding style to use lowercase commandsMartin Braun2018-11-1411-64/+64
| | | | | | | | | | | | | | | | | Also updates our coding style file. Ancient CMake versions required upper-case commands. Later command names became case-insensitive. Now the preferred style is lower-case. Run the following shell code (with GNU compliant sed): cmake --help-command-list | grep -v "cmake version" | while read c; do echo 's/\b'"$(echo $c | tr '[:lower:]' '[:upper:]')"'\(\s*\)(/'"$c"'\1(/g' done > convert.sed \ && git ls-files -z -- bootstrap '*.cmake' '*.cmake.in' \ '*CMakeLists.txt' | xargs -0 gsed -i -f convert.sed && rm convert.sed (Make sure the backslashes don't get mangled!)
* python: Adding phase alignment exampleBrent Stapleton2018-11-141-0/+545
| | | | | | | | | | | | | | This tool uses the Python API to determine if USRP devices are receiving a phase aligned signal. It is designed to be a stand-in replacement for usrp_phasealignment.py, although the capabilities and invocation are not identical. The return value of this tool will indicate whether the signal is sufficiently phase aligned, and allows integration into scripts or other test frameworks. This tool also includes options to save data to file or plot it using PyLab. Currently only supports 2 channel RX phase alignment.
* tools: Add tool to analyze settling time of gain of freq changesMartin Braun2018-10-111-0/+249
| | | | | | | | | | | | | | This tool uses the Python API to acquire a snapshot of samples during a gain or frequency change. It can be used to analyze the settling time of analog components, as well as the accuracy in time. It has two combinable ways of analyzing the data: 1) Write it to a file, or 2) plot the time-domain data. Example: This would receive several seconds of data from an X3x0 device, tune to 1 GHz, and then bump the gain by 30 dB after a set amount of time: $ rx_settling_time.py -a type=x300 -f 1e9 -g 0 --new-gain 30 --plot
* e320: Add R&D testing procedureSugandha Gupta2018-09-241-1/+84
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* fixup! Testing: Add x300 Functional VerificationVidush2018-07-201-1/+1
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* Testing: Add x300 Functional VerificationVidush2018-06-151-1/+131
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* Test: Add HA,XA,WX ImagesVidush2018-06-131-0/+6
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* Test: Run All Tests for Device and FPGA ImageVidush2018-06-131-11/+34
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* tools: Add a script for automated testing of FPGAFUNCVERIFMartin Braun2018-06-041-0/+519
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* gr-usrptest: Added copy of args to prevent mangling that resulted in a ↵michael-west2018-01-161-0/+2
| | | | parser error
* gr-usrptest: remove TODO note fix python CMakeListsAndrej Rode2017-05-262-23/+1
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* gr-usrptest: remove unit test cmake stubAndrej Rode2017-05-262-20/+0
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* gr-usrptest: add LabVIEW remote control capabilityAndrej Rode2017-05-268-23/+329
| | | | | - require modules labview_automation and hoplite for RTS python module - new python module: labview_control
* gr-usrptest: Initial creationAndrej Rode2017-05-2627-3/+4513
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - new OOT-blocks: phase_calc_ccf hier-block, measurement_sink_f - new python submodules: flowgraphs, functions, rts_tests - new apps: usrp_phasealignment.py - cmdline example for manual testing OOT-Blocks: - phase_calc_ccf takes two complex input streams and conjugate multiplys them and extracts the phase from the result and converts it to degree scale - measurement_sink_f: takes a float input stream and calculates average and stddev for a specified number of samples. Start of a measurement is invoked by a call of start_run() on the block. After a couple of runs average and stddev can be extracted. Python modules: - flowgrahps contains reconfigurable flowgraphs for different GNU Radio RF test cases - functions contains functions which are used in different apps/RTS scripts - rts_tests contains test cases which are meant to be executed from the RTS system. Depends on TinyDB, labview_automation Apps: - usrp_phasealignment.py is an example how to use the underlying flowgraph to measure phase differences. Commandline arguments of uhd_app can be used and several additional arguments can/have to be specified. Runs a phase difference measurement --runs number of times and averages phase difference over --duration seconds. Between measurements USRP sinks are retuned to random frequencies in daughterboard range. Results are displayed using motherboard serial and daughterboard serial
* gr-usrptest: init OOTAndrej Rode2017-05-2642-0/+17013
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