| Commit message (Collapse) | Author | Age | Files | Lines |
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- Sort methods by functional groups
- Reorder init from less likely to fail to more likely (this enables
the LINK LED on claim for when FPGA fails to initialize, e.g. on
compat errors)
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- Sort methods by functional groups
- Removed some cruft
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Reviewed-by: Martin Braun <martin.braun@ettus.com>
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- Updated systemd service file
- Added health status flag in shared data object
- Added thread in RPC process to update watchdog
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
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Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
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Actually-written-by: Moritz Fischer <moritz.fischer@ettus.com>
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Slot A and Slot B are different in how the JESD lanes are connected.
We now pass in different deserializer_lane_xbar config values for each slot.
Reviewed-by: Martin Braun <martin.braun@ettus.com>
Reviewed-by: Daniel Jepson <daniel.jepson@ettus.com>
Reviewed-by: Mark Meserve <mark.meserve@ni.com>
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Reviewed-by: Martin Braun <martin.braun@ettus.com>
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Before, you couldn't use to_native_str for objects such as integers
(i.e., anything that was not a bytes-like object).
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Failure to provide valid default args no longer results in an
unexpected error.
Also fixed minor formatting issues (PyLint).
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GPIOBank is the new class, n310.FrontpanelGPIO and BackpanelGPIO now
derive from that.
Other minor changes:
- Renamed classes to FrontpanelGPIO and BackpanelGPIO in accordance
with coding guidelines
- Moved MboardRegsControl before n310 class for consistent code layout
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Add code to drive back panel LEDs for GPS, Link (claim) and REF
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-By: Martin Braun <martin.braun@ettus.com>
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This thread is able to update software-controlled status pins, such as
back-panel LEDs.
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These are hooks that the RPC server calls into when claiming a device,
and allow the device implementation to trigger user-definable actions
on claiming/unclaiming.
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Reviewed-by: Brent Stapleton <brent.stapleton@ettus.com>
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Reviewed-by: Brent Stapleton <brent.stapleton@ettus.com>
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Reviewed-by: Brent Stapleton <brent.stapleton@ettus.com>
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Reviewed-by: Brent Stapleton <brent.stapleton@ettus.com>
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Reviewed-by: Trung Trang <trung.tran@ettus.com>
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There was a theoretical chance otherwise that we forgot to set the
ref_clock_freq value and it set up the LMK incorrectly.
Reviewed-by: Daniel Jepson <daniel.jepson@ettus.com>
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Removing Python 2 makes repo management for MPM a lot easier, and it's
2018 after all.
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Add a service file to start MPM on bootup via systemd.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
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Reviewed-by: Ashish Chaudhari <ashish.chaudhari@ettus.com>
Reviewed-by: Martin Braun <martin.braun@ettus.com>
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- add version control checks and bump to match latest core
- add detailed mykonos reporting
- add detailed fpga deframer reporting
- misc cleanup
Reviewed-by: Ashish Chaudhari <ashish.chaudhari@ettus.com>
Reviewed-by: Martin Braun <martin.braun@ettus.com>
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- Fixed the interpretation of the git hash
Reviewed-by: Martin Braun <martin.braun@ettus.com>
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This will provide an API call to read thermal values via udev.
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Now checks the oldest-compat-rev register. Current rev is read out for
logging purposes.
Reviewed-by: Daniel Jepson <daniel.jepson@ettus.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
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- A PHY reset is not needed for SFP Aurora. It is only really
useful when the entire quad including the commong clocking
block needs to be reset
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MPM will now no longer keep a SID framer variable.
Reviewed-by: Trung Tran <trung.tran@ettus.com>
Reviewed-by: Brent Stapleton <brent.stapleton@ettus.com>
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According to ADI, this bit toggles a lot so ignoring it for now.
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This is a band-aid solution.
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- Aurora registers moved around after SFP refactoring
in the FPGA. Reflecting changes in MPM
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- Magnesium: Bad formatting in DRP setup
- PeriphManagerBase: Import order
- dtoverlay: Missed default value for param
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Reviewed-by: Trung Tran <trung.tran@ettus.com>
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Reviewed-by: Trung Tran <trung.tran@ettus.com>
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