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* mpm: adding GPS sensor functionsBrent Stapleton2017-12-224-0/+198
* mpm: Harmonize imports, tidy + sort modulesMartin Braun2017-12-2234-71/+88
* n3xx: enable DRP access to DB MGTS & QPLLsdjepson12017-12-222-36/+249
* mpm: bfrfs: Assert reference buffer is a byte stringMartin Braun2017-12-221-0/+1
* mpm: Enable TX external LO set through args, simplify codeTrung N Tran2017-12-221-11/+19
* tdc: fix bug in pps capture reportingDaniel Jepson2017-12-222-8/+19
* mpm: add all time_source options and complete MB clk controlDaniel Jepson2017-12-221-10/+96
* mpm: added uio for motherboard regssugandhagupta2017-12-221-7/+47
* mpm: Factor out xport managers as own objectsMartin Braun2017-12-229-233/+328
* mpm: utils: Add string conversion utilitiesMartin Braun2017-12-221-0/+42
* mpm: close unused pyroute objectsTrung N Tran2017-12-221-33/+39
* mpm: Return correct value for usrp_hwd.py --init-onlyMartin Braun2017-12-221-1/+1
* mpm: Fix python2 vs python3 zlib.crc32 output differenceSteven Bingler2017-12-221-1/+1
* mpm: n310: Compile .dts files to .dtbo on updateMartin Braun2017-12-221-7/+31
* mpm: mg: Refactor init(), limit object scopesMartin Braun2017-12-221-39/+53
* mpm: Add temporary failure for FPGA reloadMartin Braun2017-12-221-0/+9
* mpm: Reset periph manager on updateBrent Stapleton2017-12-224-15/+105
* mpm: adding destructor for UIOBrent Stapleton2017-12-221-0/+11
* mpm: PeriphManager decides and applies overlayBrent Stapleton2017-12-225-57/+14
* fpga load: Components file paths in component dictBrent Stapleton2017-12-221-9/+12
* fpga load: Atomic updating of multiple componentsBrent Stapleton2017-12-222-40/+46
* mpm: mg: Add ref lock sensorMartin Braun2017-12-221-0/+15
* mpm: lmk04828: Fix docstringMartin Braun2017-12-221-2/+2
* mpm: mg: Add flag to see if master clock rate is being changedMartin Braun2017-12-221-10/+26
* mpm: mg: Fix linter errors, compacted SPI factoriesMartin Braun2017-12-221-27/+16
* mpm: mg: Move some class attributes to local scopesMartin Braun2017-12-222-32/+38
* mpm: n310: Remove unused imports (linter warnings)Martin Braun2017-12-221-2/+1
* mpm: mg: Remove unused spi_factories keyTrung N Tran2017-12-221-5/+3
* mpm: mg: Set default master_clock_rate to 125 MHz at every initTrung Tran2017-12-221-0/+2
* mpm: mykonos: Add API to change master clock rateTrung N Tran2017-12-221-1/+5
* jesd: add reset routine and make portions more generic for various linksdjepson12017-12-221-33/+101
* n3xx: add support for 122.88 and 153.6 MHz sample clock ratesMartin Braun2017-12-225-91/+207
* mg: Enable variable master clock ratesMartin Braun2017-12-221-2/+6
* mpm: mg: Add dboard sensors for low- and highband LO lock statusMartin Braun2017-12-222-14/+26
* mpm: Let usrp_hwd.py --init-only show init status and durationMartin Braun2017-12-221-1/+10
* mpm: mg: Optionally parallelize init calls to dboardMartin Braun2017-12-221-3/+19
* mpm: n310: Made n310.__init__() more exception-safeMartin Braun2017-12-221-1/+15
* mpm: Made PeriphManagerBase.__init__ more exception-safeMartin Braun2017-12-221-4/+13
* mpm: discovery returns 'product' informationBrent Stapleton2017-12-222-2/+5
* n3xx_bist: remove unused python packageTrung N Tran2017-12-221-1/+0
* mpm: mg: Make Magnesium __init__ exception-safeMartin Braun2017-12-221-5/+33
* mpm: Make dboard manager __init__ exception-safeMartin Braun2017-12-221-12/+17
* mpm: net: Add ip_addr_to_iface() functionMartin Braun2017-12-221-0/+17
* mpm: n310: Allow Ethernet connections to both SFPsMartin Braun2017-12-221-16/+30
* mpm: enable RX external LO set through argsTrung N Tran2017-12-221-0/+11
* mg: enable init and track calibration APITrung Tran2017-12-221-2/+21
* mpm: Run C++ logger through central loggingMartin Braun2017-12-221-0/+16
* mpm: mg: Add lowband LO lock and AD9371 lock sensorsMartin Braun2017-12-222-3/+55
* mpm/mpmd: Move to request_xport()/commit_xport() architectureMartin Braun2017-12-225-166/+386
* mpm: Lower logging level for PeriphManagerBase.deinit()Martin Braun2017-12-221-2/+2
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