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* sim: Move Hardware Specific to Config FileSamuel O'Brien2020-10-287-44/+124
| | | | | | | | This commit moves various magic numbers and hardware specific settings into the configuration file. It also provides default presets for said configuration files which can be inherited from. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
* sim: Implement UHD > Simulator Flow ControlSamuel O'Brien2020-10-281-18/+47
| | | | | | | | | When sending data to the simulator, python simply cannot process the data as fast as UHD can send it. Flow control ensures that uhd doesn't overwhelm the simulator. Simulator > UHD flow control isn't implemented yet. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
* sim: Support Timed StreamsSamuel O'Brien2020-10-282-1/+10
| | | | | | | | The only difference between a standard and timed stream is that the first data packet of a timed stream contains a timestamp. This commit adds the necessary fields to StreamSpec to accomplish this. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
* sim: Support Configuration FilesSamuel O'Brien2020-10-284-8/+58
| | | | | | | | This commit adds support for configuration files to the simulator. As of now, these files only change the source and sink of data samples, but they are easily extensible to add more configuration to the simulator. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
* sim: Support StreamingSamuel O'Brien2020-10-287-346/+859
| | | | | | This commit add support for both Tx and Rx streams to the simulator. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
* sim: Clarify Naming of StreamsSamuel O'Brien2020-10-083-23/+25
| | | | | | | | | ChdrSniffer is renamed to ChdrEndpoint to clarify its function as the actual destination of chdr packets, rather than just an observer. TxWorker has been renamed to OutputStream and RxWorker has been renamed to InputStream to avoid ambiguities regarding Tx and Rx terminology. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
* sim: Simulator CHDR Parsing and RFNoC GraphSamuel O'Brien2020-10-085-0/+1106
| | | | | | | | | This commit adds a simulated RFNoC Graph to the simulator. It is also able to process management and control packets which can traverse the graph and read from simulated registers. Stub callbacks for creating streams have been provided but are not implemented yet. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
* sim: Add Daughterboard MethodsSamuel O'Brien2020-10-074-0/+110
This commit adds daughterboard simulation to the simulator. There is a sim_dboard class which registers it's methods with the rpc server. These methods are visible over mpm as well as the mpm_shell. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>