| Commit message (Collapse) | Author | Age | Files | Lines |
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So, the Python garbage collector is a bit pernicious, in that it happens
behind the scenes in a way which is difficult to predict. The rfdc_ctrl
class expects that its "lifetime" will be a single live/die cycle of the
FPGA (i.e. that when a new FPGA is loaded, it will be destructed).
However, by default the Python GC will keep the X4xxRfdcCtrl class alive
for an arbitrary amount of time, meaning that it's possible that
multiple (C++) rfdc_ctrl classes can be alive at a single time.
When the GC reaps all of these classes, libmetal segfaults when we call
metal_finish several times in a row. This change works around that
issue, if not the overall GC issue, by explicitly deleting the rfdc_ctrl
object.
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There currently isn't a way to access the motherboard register using MPM
(the ones defined in x4xx_global_regs). This commit adds a simple
interface to peek and poke them which is very similar to the current
interface for the daughter board registers.
Signed-off-by: Sam O'Brien <sam.obrien@ni.com>
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This fixes an issue where the slot 0 ADC blocks would erroneously
report that they were unfrozen.
Additionally, adds logic to restore a saved cal freeze state on
sync source change.
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After setting sync sources, the RFDCs get reset, we need to restore the previously set frequencies so that the device continues to transmit/receive at the requested frequency
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Co-authored-by: Lars Amsel <lars.amsel@ni.com>
Co-authored-by: Michael Auchter <michael.auchter@ni.com>
Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Cristina Fuentes <cristina.fuentes-curiel@ni.com>
Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com>
Co-authored-by: Virendra Kakade <virendra.kakade@ni.com>
Co-authored-by: Lane Kolbly <lane.kolbly@ni.com>
Co-authored-by: Max Köhler <max.koehler@ni.com>
Co-authored-by: Andrew Lynch <andrew.lynch@ni.com>
Co-authored-by: Grant Meyerhoff <grant.meyerhoff@ni.com>
Co-authored-by: Ciro Nishiguchi <ciro.nishiguchi@ni.com>
Co-authored-by: Thomas Vogel <thomas.vogel@ni.com>
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