uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	Remove FSRU-related files	Martin Braun	2022-02-22	1	-1/+1
\| \| \| \| \| \| \|	The FSRU (aka EISCAT) was never supported in UHD 4.0. The FPGA repository never had the relevant files, and the block controller also never existed. This removes all the corresponding files from MPM, as well as some references from makefiles.
*	mpm: Update all license headers	Martin Braun	2018-02-19	1	-2/+2
\| \| \| \| \|	- Fix typo in company name (missing 'a') - Updated SPDX license identifier to version 3.0
*	mpm: Harmonize all license header	Martin Braun	2017-12-22	1	-13/+2
\| \| \| \|	Now uses SPDX headers everywhere.
*	mpm: Harmonize imports, tidy + sort modules	Martin Braun	2017-12-22	1	-2/+1
\| \| \| \| \| \| \| \|	- Moved nijesdcore to cores/ - Moved udev, net, dtoverlay, uio to sys_utils/ - Made all imports non-relative (except in __init__.py files) - Removed some unnecessary imports - Reordered some imports for Python conventions
*	mpm: Moved over to new logging infrastructure	Martin Braun	2017-12-22	1	-3/+0
\| \| \| \|	Also currently hardcodes some settings.
*	mpm: mpm reorganization	Andrej Rode	2017-12-22	1	-4/+5
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*	mpm: python refactoring	Andrej Rode	2017-12-22	1	-0/+32