| Commit message (Collapse) | Author | Age | Files | Lines |
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Mostly cosmetic and Pylint fixes.
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Add SPCC reg map for reference and testing.
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Add RegMaps build component to MPM. The PYTHON_CHECK_MODULE is
included from UHDPython in order to look up the presence of Mako.
Mako is required for generating the regmaps and RegMap will be
disabled without it. The RegMaps component creates custom commands for
generating all regmaps, creates a Python submodule "ic_reg_maps" with a
custom __init__.py file, and creates a target "ic_reg_maps" which gets
installed with usrp_mpm.
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Added an LMK03328 base chip driver which does basic register access, ID
validation, and PLL lock validation. This will act as the base class for
device specific drivers which control the chip. The code it similar to
the LMK04828 and LMK04832 base driver classes but has a different
register map structure. Register bitfield definitions were omitted and
will be added on an as needed basis.
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Added an LMK04832 base chip driver which does basic register access, ID
validation, and PLL lock validation. This will act as the base class for
device specific drivers which control the chip. The code is similar to
the LMK04828 base driver class, but has a different register map
structure.
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Updating all SPDX license identifiers to include "-or-later"
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Also updates our coding style file.
Ancient CMake versions required upper-case commands. Later command
names became case-insensitive. Now the preferred style is lower-case.
Run the following shell code (with GNU compliant sed):
cmake --help-command-list | grep -v "cmake version" | while read c; do
echo 's/\b'"$(echo $c | tr '[:lower:]' '[:upper:]')"'\(\s*\)(/'"$c"'\1(/g'
done > convert.sed \
&& git ls-files -z -- bootstrap '*.cmake' '*.cmake.in' \
'*CMakeLists.txt' | xargs -0 gsed -i -f convert.sed && rm convert.sed
(Make sure the backslashes don't get mangled!)
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- For different ref clock frequencies, the ref_counter should change
and not the n_counter.
- The charge pump should be set to normal mode and tristate as that
would prevent the PLL to lock.
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Adding ADF400X driver to MPM. This uses the Boost.Python bound spidev,
and is largely a translation from the C++ driver in UHD.
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No functional changes.
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The log output at level 'INFO' was pretty cluttered. This cleans up the
log messages at the higher levels. In some cases, log message typos or
capitalizations were also fixed.
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- Fix typo in company name (missing 'a')
- Updated SPDX license identifier to version 3.0
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Now uses SPDX headers everywhere.
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- Moved nijesdcore to cores/
- Moved udev, net, dtoverlay, uio to sys_utils/
- Made all imports non-relative (except in __init__.py files)
- Removed some unnecessary imports
- Reordered some imports for Python conventions
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Says check_plls_locked() would throw an exception. That's not true.
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The clock_synchronizer, jesdcore, and dboard_clk_control objects don't
need to exist for the full lifetime of the Magnesium class. Having them
around complicates management of UIO file descriptors.
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- re-wrote portions of the LMK driver for flexible rates and configuration
- tweaked TDC driver for compatibility and ease of debugging
- updated comments and log statements throughout for uniformity
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Log prefixes weren't properly being set.
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- Register 0x150 bit [1] to '0'
- Change lock detect to poll operation
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