| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | mpm: e320: n3xx: Factor BIST code to common module | Martin Braun | 2018-10-24 | 1 | -508/+53 |
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| * | e320_bist: print extra output ref_clock tests | Trung Tran | 2018-10-18 | 1 | -3/+6 |
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| * | e320: bist: Add link_up test | Sugandha Gupta | 2018-08-06 | 1 | -0/+26 |
| | | | | | - Returns true if the link of sfp0 is up (1G/10G) | ||||
| * | e320: bist: Fix ref_clock lock test implementation | Sugandha Gupta | 2018-08-02 | 1 | -24/+42 |
| | | | | | | | | - ref_clock_(int/ext) test was not changing adf400x driver settings for new ref clock frequency. Therefore, changed the implementation to use uhd_usrp_probe --sensor to set clock_source and get 'ref_locked' sensor value | ||||
| * | e320: Update temp and fan bist | Sugandha Gupta | 2018-07-31 | 1 | -10/+21 |
| | | | | | | - Add mapping for 5 thermal zones for TMP464 - Update to one cooling_device as e320 has 1 fan (optional) | ||||
| * | e320: update sfp loopback test to load AA FPGA image | Sugandha Gupta | 2018-07-31 | 1 | -19/+76 |
| | | | | | | - Load AA FPGA image before sfp bist and load default image after the test | ||||
| * | e320: Fix front panel gpio to support 3.3V | Sugandha Gupta | 2018-07-31 | 1 | -2/+0 |
| | | | | | | - E320 will support only 3.3 V for the front panel GPIO - Remove other voltage options | ||||
| * | mpm: e320_bist: Add tests for running BIST on E320 | Sugandha Gupta | 2018-07-18 | 1 | -0/+769 |
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