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Slot A and Slot B are different in how the JESD lanes are connected.
We now pass in different deserializer_lane_xbar config values for each slot.
Reviewed-by: Martin Braun <martin.braun@ettus.com>
Reviewed-by: Daniel Jepson <daniel.jepson@ettus.com>
Reviewed-by: Mark Meserve <mark.meserve@ni.com>
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Now uses SPDX headers everywhere.
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- EISCAT is now Python only with the exception of the definition of the
SPI ifaces
- Magnesium uses a Python-generated SPI iface
- Removed SPI lock from EISCAT dboard
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- Created clean interfaces for SPI and registers
- Severed most links to UHD
- Added a lockable class which allows exposing mutexes into Python
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