summaryrefslogtreecommitdiffstats
path: root/host
Commit message (Expand)AuthorAgeFilesLines
...
* usrp2: added retry logic to control packetsJosh Blum2012-02-201-2/+32
* usrp2: changed download url for dd.exeJosh Blum2012-02-182-2/+2
* uhd: added -fvisibility-inlines-hiddenJosh Blum2012-02-181-1/+2
* Merge branch 'next'Josh Blum2012-02-1759-394/+1268
|\
| * dsp rework: fix for vita occ trailer packingJosh Blum2012-02-171-1/+1
| * dsp rework: added flusher to vita tx chain on clearJosh Blum2012-02-152-5/+8
| * uhd: added async md user payload and common utilsJosh Blum2012-02-145-48/+100
| * b100: use frame boundary to calculate frame sizeJosh Blum2012-02-142-4/+6
| * b100: reset/reenumerate fx2 for bad endpoint stateJosh Blum2012-02-143-0/+31
| * b100: added transport flushes and moved around reset codeJosh Blum2012-02-143-13/+7
| * dsp rework: minor fix sph, set has time spec for tsf onlyJosh Blum2012-02-141-2/+2
| * uhd: inline time spec accessors for minor improvementJosh Blum2012-02-132-15/+18
| * uhd: add over-the-wire option to tx waveformsJosh Blum2012-02-121-2/+3
| * b100/usrp1: various tweaks for compiler warns and valgrindJosh Blum2012-02-094-9/+10
| * uhd: various tweaks for compiler warns and valgrindJosh Blum2012-02-099-19/+28
| * uhd: fixed sse2 conversion fc32 to sc8_item32_beJosh Blum2012-02-091-2/+2
| * uhd: fixed orc conversion fc32 to sc8_item32_beJosh Blum2012-02-091-1/+1
| * B100: Firmware reset tweaks.Nick Foster2012-02-091-1/+1
| * uhd: added sse2 conversions for fc32 to sc8Josh Blum2012-02-082-0/+151
| * uhd: added sse2 conversions for fc64 to sc8Josh Blum2012-02-085-10/+167
| * Add Orc functions to convert to sc8. bswap version is a bit of a hack.Nick Foster2012-02-082-0/+28
| * e100: loopback test fix after register tweaksJosh Blum2012-02-081-2/+1
| * uhd: better quantization check for convert testJosh Blum2012-02-081-4/+5
| * uhd: added sc8 conversion testsJosh Blum2012-02-074-10/+139
| * dsp rework: implement 64 bit ticks, no secondsJosh Blum2012-02-0620-109/+120
| * B100: use FPGA external reset on initNick Foster2012-02-062-0/+7
| * b100/e100: unify rx/tx fifo clears into oneJosh Blum2012-02-044-14/+8
| * b100: delete some unused registers from mapJosh Blum2012-02-042-7/+0
| * dsp rework: added otw mode for benchmark appJosh Blum2012-02-031-6/+9
| * dsp rework: move setting address of format registerJosh Blum2012-02-022-6/+4
| * dsp rework: work on usb wrapper for smaller packets, large lutsJosh Blum2012-02-0215-80/+105
| * b100: sc8 mode not implemented errorJosh Blum2012-02-011-0/+4
| * b100: bump compat numbers for slave fifo modeJosh Blum2012-02-011-1/+1
| * B100: Modified TX send size to achieve 10.7Msps.Nick Foster2012-02-011-1/+1
| * B100 host code changes to remove TX padding, remove RX padding, increase max ...Nick Foster2012-02-012-3/+3
| * dsp rework: account for no sid used in tx vita pktJosh Blum2012-02-013-1/+4
| * dsp rework: tx trailer, scaling work (peak)Josh Blum2012-01-3111-31/+110
| * gen2: added user setting regs api and user coreJosh Blum2012-01-3114-2/+132
| * dsp rework: work on scaling and args parsing on RX and TX dspJosh Blum2012-01-317-38/+60
| * dsp rework: implemented new scalefactor in rx dsp coreJosh Blum2012-01-319-21/+35
| * uhd: implement convert_sc8to_sc16 table w/ scalarJosh Blum2012-01-311-0/+30
* | usrp1: big endian compile fix, conversion should cast to unsignedJosh Blum2012-02-121-2/+2
* | windows: do not set process wide priority from thread prioJosh Blum2012-02-081-0/+4
* | Fixing TX mixer disable, maxing out attenuation when not in use.Ben Hilburn2012-02-072-57/+39
* | Fixing ADF4351 dividers, even though they won't get used.Ben Hilburn2012-02-071-2/+2
* | Random formatting while reading through ATR.Ben Hilburn2012-02-071-16/+37
* | uhd: updated sync docs for current APIJosh Blum2012-02-021-30/+25
|/
* uhd: branch-less round for time spec convert to ticksJosh Blum2012-01-311-2/+1
* usrp1/b100: reenumeration loop with timeout only when foundJosh Blum2012-01-272-2/+6
* Swap I/Q on transmitJason Abele2012-01-271-1/+1
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 04:27:17 +0000