| Commit message (Collapse) | Author | Age | Files | Lines |
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Its important to use a signed cast when converting float to int.
Then assign that signed int to an unsigned type of the same width.
Its undefined behaviour when converting a negative float to an unsigned int.
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These register addresses should be in hex.
Fortunately, they are not set in the code,
so the typo did not break anything in UHD.
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has_key is not in python3.0, use key in dict
put try catch around interface enumeration, might be an ipv6 issue
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The actual recv buffer will be automatically released when dereferenced.
By releasing this buffer early we allowed for a race condition:
Subsequent wrapper buffers that shared the same actual buffer
could get their memory filled by new recvd packets from the USB layer.
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given performance benchmarks involving the converter,
when the driver is also doing other things
sc8 conversions will still involve tables since
no SIMD implementations exist yet
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specified in UHD_RELEASE_MODE
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This fixes the bug of unwanted clearing when setting format.
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This is a typo in the set_clock_config implementation.
However, the enum values are the same, so this would not cause a bug.
Fixed although set_clock_config is a deprecated interface.
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Fixes compilation on platforms that dont have one of the OS defines
by providing #else case for rx_dsp_buff_size constant.
This also makes OSX the special case and assumes other OS
can handle the large RX socket buffer size.
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Its important to stop the threads before we let
the other smart point objects naturally deconstruct
to avoid thread-based race conditions.
The attempt to deconstruct the tree and soft time ctrl
had a bug because the tree had references in subtrees
within the dboard manager class.
Rather than continue to fix this method and
deconstruct the tree to free up soft time ctrl,
it seems simpler to just stop the thread in soft time ctrl,
and then let it naturally deconstruct later by ref count.
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Better to give an output than just an empty pause.
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This fixes the lockup/clocking condition when the following hw combo is used:
USRP1 r4.5 + DBSRX + another i2c board
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Mask off upper bits when setting a constant offset (I and Q regs).
The sign bits (if negative) can flow off into the flags field.
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Some ADA4927 / AD5380 combinations do not appreciate
being disabled, so lets not disable them
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"stuffing zeroes" problem and improves transport reliability.
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Must zero out the default IQ correction to have zero effect by default.
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This appears to build uhd cross using my toolchain. Run cmake with:
cmake -DCMAKE_TOOLCHAIN_FILE=../cmake/Toolchains/arm_cortex_a8_cross.cmake \
-DENABLE_E100=ON -DENABLE_USRP_E_UTILS=TRUE ../
It does not detect orc properly.
Signed-off-by: Philip Balister <philip@opensdr.com>
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between Windows x86 and x64.
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Improve incorrect calculation in XCVR
Remove RFX rssi sensor due to limited dynamic range giving strange
results
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Fedora installers
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1) this was registered as the sc8 to sc16 converter,
probably messed that up as well
2) the cast to index was wrong, now unit test passes
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1) use bottom bit for force lock condition,
that way we never check the time after proper shutdown
2) dont allow lock condition under fpga compat mismatch
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More git info used for build info
UHD version incorporates build info
apt/yum repos use new version number
New installer filename syntax
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This fixes a bug where the sc8 engine will not interpret
the packet as an IF data packet due to uninitialized bits.
In that case the sc8 packet would pass through and be
interpreted by the downstream as an sc16 packet.
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Unlike the other products, usrp1 uses the DAC and not DSP
to perform baseband frequency shifting in the hardware.
Therefore this shifting occurs before I and Q swapping,
and so, the sign of the frequency needs to be inverted
on daughterboards which have inverted I and Q TX inputs.
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Must subtract off the 511 for 512 modulus remainder commit.
This bug was introduced by the conversion to streamer API.
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