| Commit message (Collapse) | Author | Age | Files | Lines |
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loopback fpga image. Needs debug.
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number errors so program can start with "dirty" fpga contents.
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of flags.
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Fixed error in db basic freq range switcheroo.
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Conflicts:
host/utils/CMakeLists.txt
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Added unit test for generated converter.
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(also switched to boost endian define to avoid c compiler check)
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pack and unpack for little endian.
The vrt handler code was templatized to take the relevant packer/unpacker as an argument.
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avoid collision with usrp2 (those need to be renamed as well)
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on exit
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