| Commit message (Collapse) | Author | Age | Files | Lines |
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In log.cpp, a deadlock can occur while popping elements from the log
queue. If the queue is empty, the call does not timeout, and waits
infinitely. Replacing pop_with_wait() with pop_with_timed_wait() solves
this issue.
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- Update MB EEPROM
- Add bootloader load command to fx3 util
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dpdk_zero_copy.hpp was referenced in multiple places using relative
paths. Let's throw it in uhdlib for easy access.
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Use dpdk_simple together with a control transport factory.
Where udp_zero_copy is used, use dpdk_zero_copy if use_dpdk=1.
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With the same APIs, this will make it easier to add support for X310.
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The NI-2974 has a X310 inside but reports a different "product" when
polled. This prevents the image_loader from flashing a new FPGA image,
this patch enables this.
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Occasionally, MPM would check its links before the kernel would report
link up, and it would then shave those ports off the CHDR link list
prematurely. This commit adds a second of wait to allow the kernel time
to respond.
It also includes some additional reporting of link status, since Intel
PMDs may report a misleading initial state upon bring-up.
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This reverts commit c8e01d4bd5bef30ef6e6080c60bc8b4706eb1200.
The commit introduced random phase offsets for TwinRX phase alignment.
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Revert "cores: Update rx_frontend_gen3.v controls for 1/4-rate mixer"
Commit introduced 180 degree ambiguity in TwinRX phase alignment.
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The N value was getting written twice and the second value being
written was 1, which works for all use cases except when using
TwinRX. This change fixes several issues with TwinRX including
streaming failing to stop cleanly and incorrect decimation.
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Removing the flush in configure_flow_control_out(). The flush is done
incorrectly because it just disables flow control and allows packets
to dump onto the crossbar, which could lock it up. It is also
incorrect to flush when connecting blocks. A connect should just
configure the SID and flow control and let any existing data flow to
the newly connected block. Flushing of a block should only be done
during creation or destruction of the block.
Signed-off-by: Michael West <michael.west@ettus.com>
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This reverts commit 655b9b0f8e8f8556d434404da51aaccd124bbc3a.
Signed-off-by: Michael West <michael.west@ettus.com>
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- modify PLL charge pump values to improve phase coherence
- affects reference clocks of 11.52 MHz, 23.04 MHz, and 30.72 MHz
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- ADC self test had magic numbers for default duration
- resource and addr can be no longer be both specified without a warning
- second_addr requires addr now, or you get a warning
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Before, it was only returning the master clock rate. Note: This function
is never used in UHD, this is merely for completion's sake.
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The addition of the constrained device args didn't account for those
rates, and thus, they were effectively unusuable ever since. This adds
those rates back as valid system ref rates.
This does not touch the actual clocking code in any way,
x300_clock_control has supported those rates for a while now.
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This makes more type-conversions explicit, to reduce the number of
warnings specifically for MSVC.
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This fixes a warning about multiple operators. Doesn't change any
functionality.
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Image name to be provided to bitbake command are named 'developer-image' and 'deployment-image'
i.e. with dash, not with underscore
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When using a buffer size smaller than recommended, a warning would be
printed with the wrong value (it would print the default value, not the
actual value).
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setuptools isn't compatible with Unix style path on Windows 10
machines. We need to convert any path before running setuptools.
Signed-off-by: Trung Tran <trung.tran@ettus.com>
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MP and bigobj should be at compile options level instead of
compile_flags(which are at target properties level).
We have been setting these options incorrectly. They are currently not
applied to any project.
Signed-off-by: Trung Tran <trung.tran@ettus.com>
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The function for setting up the RX frontend was erroneously looking at
previous TX settings to determine whether to submit a command. This
fixes the issue.
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A node is not a block, it doesn't use any block definition to
populate the number of input and output ports. This is equivalent to it
have undefined number of input and output ports.
The _find_child_node function relies on node input and output port size.
When port size is not defined we should not follow the active channel;
instead, we need to greedily to find all child node.
Without this change graph_search_test will fail.
Signed-off-by: Trung Tran<trung.tran@ettus.com>
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MPM has a flag that identifies component reloads as requiring to restart
the RPC server. This change honours that flag, and doesn't cause a fatal
failure when reclaims fail to ack for certain operations.
For example, running uhd_image_loader on an N310 could fail after the
FPGA was reloaded because the communication to the RPC server was
temporarily interrupted. This is not always avoidable, since the RPC
server does actually go down, and Ethernet connections might also be
lost. So, we cut our losses and accept failures in that case.
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- UHD's calibration utilities use the LO frequency, so this is the
frequency we should be using too.
- Disables loaded corrections in lowband, as the utilities will not
generate valid corrections at these frequencies. Manual corrections
can still be added via the property tree.
- Changed corrections logging to include frequency and less certainty
of the correction file's existence.
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- Fixes a bug where a previous setting could carry over between
sessions.
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- The other cal utilities (TX IQ and TX DC) already do this.
- This fixes calibration for certain frequencies on N320/N321.
- Old calibration data is still valid after this change.
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Remove "${prefix}/lib" from the DYLD path for APPLE only. Apple's DYLD
uses the paths embedded in the binary file (library or executable) as a
secondary means for finding referenced libraries. Explicitly including
"${prefix}/lib" can result in libraries being found and used by System
frameworks that are not compatible with them. Moving to just using build
paths fixes this issue.
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The configure_flow_control_out function was set to dump any packets
onto the crossbar, which could cause issues on the crossbar and in
downstream blocks. Replacing wil a call to the _flush() function in
the block_ctrl_base parent class, which drops the packets so they do
not get put onto the crossbar.
Signed-off-by: Michael West <michael.west@ettus.com>
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FC ACK packets are unnecessary on lossless links and degrade overall
performance. This change disables those packets on all lossless links.
Signed-off-by: Michael West <michael.west@ettus.com>
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The RFNoC call set_rx_gain() would previously ignore the additional 6 dB
that can be set on the ADC. On the BasicRX board in particular, this
meant there was no RX gain setting at all.
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This change prevents invalid positional options from being accepted into
uhd_image_loader. Previously, if a user forgot to specify the option
type, uhd_image_loader would proceed and look like it succeeded, but the
intended image may not have been loaded.
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The link to the MPM page in the DPDK docs was incorrectly named. This
change links to the correct page name.
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Fixes issue where Doxygen doesn't recognize a block within N3XX's Salt
subsection as code.
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- expert_nodes.hpp: fix to work with BOOST_VERSION < 105600, since UHD
still supports Boost 1.53.00.
- gpio_atr_3000.hpp: requires boost::noncopyable header, so replicate
that (now) in export_nodes.hpp.
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- Updated CHANGELOG
- Updated fpga-src submodule
- Updated version info
- Updated manifest
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