| Commit message (Collapse) | Author | Age | Files | Lines |
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- rx_dsp_core: set_mux takes in a fe_connection obj
to determine IQ mapping and sampling mode parameters
- rx_dsp_core: Support a non-zero IF for downconversion
The current strategy applies a software DSP freq offset
which eats into the range of the CORDIC which is OK
because heterodyne assumes real-mode sampling
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- Wraps a sampling mode and IF frequency
- Built-in parser to deduce swap,invert,mode bits from string connection
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* Removed code referencing now-unsupported versions of Boost
* Added <stdint.h> includes where needed
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* nirio_driver_iface_win: labeled unused variable for MinGW builds
* b200_impl: fixed unreferenced variable warning
* n200_image_loader: fixed signed vs. unsigned comparison
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When querying temp mboard sensor on e300, sysfs attributes are read
through udev.
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Window's WinUSB driver doesn't support multiple processes accessing a
single USB device and libusb_open returns LIBUSB_ACCESS_ERROR when
trying to access an already claimed USRP. One device access did not
catch this exception and caused UHD to error during USRP discovery.
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- Fixed segfault issue for graph modification errors
- Demangled node type names and added quotes to "dot" labels to allow fully qualified C++ names
- add_prop_node functions initialize the property objects in the tree in addition to data nodes
- Passed in resolve mutex to desired data node correctly
- Added == and != operators to data accessors
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- The typical dboard classes are actually "subdev" classes i.e.
there is one instance per dboard subdev (front-end). This makes
it hard to implement shared functionality between multiple
front-ends.
- This changes adds the ability to create a container class which
is created per group of subdevs and each subdev gets a pointer
to the container class for cross linkage.
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- Interface and all base classes have virtual destructors
- Wrapped UBX dtor in UHD_SAFE_CALL
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Conflicts:
host/lib/usrp/cores/gpio_core_200.cpp
host/lib/usrp/dboard/db_ubx.cpp
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- Disabled MAX2871 VCO auto selection for phase sync
- Added checks for new phase sync constraints recently published by Maxim
- Added dboard_clock_rate option for X300
- Adjusted timing of SYNC signal relative to dboard referenc clock
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- DB connection mapping is implemented in DDC chain. FE corrections module does not swap
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- Made dboard_iface an interface! Removed PIMPL
- Added unit "BOTH" to dboard API and expanded GPIO API width to 32
- Removed gpio_debug_mux. No product ever used that
- Refactored gpio_atr cores to work with new dboard_iface
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- Moved dboard iface initialization to dboard_manager
- Added a restricted register function. Restricted dboards
don't expose their control iface in the property tree
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- Removed adf435x_common and replaced with a real encapsulated interface
- Looks similar to the MAX287X code
- Updated all DB classes to use the new common code
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- Code location uhd/lib/experts
- expert_nodes.hpp contains all node definitions: data and worker
- expert_container.hpp contains the memory manager and resolver for expert nodes
- expert_factory contains the initializer and modifier for expert_container
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- Added auto and manual coerce modes
- Added set_coerced API for manual coercion
- Added detailed doxy comments describing behavior of property class
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- Added desired and coerced values and accessors to property
- Added support to register desired subscribers
- set APIs don't reallocate storage for a property value
- Renamed callback method registration APIs
- Registering 2 coercers or publishers for a property will throw
- Registering a coercer and a publisher for the same property will throw
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- Added copy ctor and assignment operator
- Possibly ABI breaking
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- Improved FW/FPGA compat mismatch error messages
- Added power-cycle message to loader
- Disabled "SW too new for HW" version check
- Added retry mechanism in n230_find to allow for ARP updates
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