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* gpsd_iface: fixed ambiguity in boost::assign::list_of usage
* b100/clock_ctrl: fixed "misleading indentation" warning
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This proved helpful on devices where the EEPROM is wrong about hardware
revision, and the EEPROM writing doesn't work, because the ADC self-test
fails due to being run for the wrong board revision.
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* host: consistency in setting packet sequence numbers
* firmware: populate packet length field when setting GPSDO cache
* both: logic for dealing with mismatching compatibility numbers
Reviewed-By: Michael West <michael.west@ettus.com>
Reviewed-By: Martin Braun <martin.braun@ettus.com>
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* Version numbers now Major.API.ABI.Patch
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There's an off-by-one error in base64_decode_value that results in undefined behaviour when it's passed `'\x7b'`
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super_send_packet_handler
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super_recv_packet_handler
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This proved helpful on devices where the EEPROM is wrong about hardware
revision, and the EEPROM writing doesn't work, because the ADC self-test
fails due to being run for the wrong board revision.
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Now, use `do{...} while(0)` to pack multiple statements
into a single one that isn't fragile.
Currently
```
if(state_just_right)
OCTOCLOCK_SEND_AND_RECV(all,the,options);
```
would introduce annoying bugs.
Generally, there's no good reason this is a `#define` rather than a
C/C++ function.
The `OCTOCLOCK_PACKET_MATCHES` should probably be a C function, too,
or simply an overloaded `==` operator on to `const octoclock_packet_t&`.
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- Removed force on of components to reduce noise, power consumption, and heat
- Set TX PA force on only when RX antenna set to RX2 to remove long TX transient caused by HW issue on TX path
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- The spectral distortion was begin caused by the DAC FIFO
underflowing. The fix was to run through the DAC sync
procedure which uses the falling edge clock to sample
the RefClk and sync it with the data clk
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- If there were duplicate IPs in the mboard eeprom, the last one would be selected instead of the first
- The default IP addresses (used for the case where the mboard eeprom can't be read) would overwrite the previous settings
- Added a warning for duplicate IP entries in the mboard eeprom
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- This change ensures that the smallest frame size is chosen with dual ethernet
- It helps avoid any issues with using frame sizes larger than what the smaller link supports
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- A dboard_base class can have multiple frontends (subdevs) and
the set_fe_connection needs to be able to distinguish between them
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- Fixed an issue where 10GE on the HGS image presented a false warning for the link capacity
- Removed some unnecessary variables after cleanup
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Conflicts:
host/CMakeLists.txt
host/lib/usrp/b200/b200_impl.cpp
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Conflicts:
fpga-src
host/cmake/Modules/UHDVersion.cmake
host/lib/usrp/b200/b200_impl.cpp
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DSP rates are now being tracked as in whether or not they've been set.
We can disregard unset DSPs for the automatic clock rate calculation.
Reviewed-By: Derek Kozel <derek.kozel@ettus.com>
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Kernels (3.15+) introduce the possibility to do DUAL and QUAD spi
operations via spidev.
Prior to this commit nothing was setting the {tx,rx}_nbits members
of the struct spi_ioc_transfer.
from include/uapi/linux/spi/spidev.h
struct spi_ioc_transfer {
__u64 tx_buf;
__u64 rx_buf;
__u32 len;
__u32 speed_hz;
__u16 delay_usecs;
__u8 bits_per_word;
__u8 cs_change;
__u8 tx_nbits;
__u8 rx_nbits;
__u16 pad;
};
This turns into an issue on more recent kernels,
where it turns all transactions into QUAD transactions,
while the controller actually doesn't support that mode of
operation.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
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Conflicts:
host/lib/usrp/cores/gpio_core_200.cpp
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- Updated images
- E310: Bumped compat number to 16 for radio reset fix
- Update fpga-src submodule pointer
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Unrolling the RX loop showed marked improvement with perf. The TX path
was only slightly better. Checked signal correctness with shinysdr to verify
received signal and tx_waveforms into a spectrum analyzer for TX.
Signed-off-by: Philip Balister <philip@opensdr.com>
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