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* usrp1: removed print from codec_ctrl last commitJosh Blum2012-05-171-1/+1
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* Fixing USRP1 aliasing logicNicholas Corgan2012-05-171-2/+36
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* Removed GPGSA from GPS driver since Firefly doesn't actually support it.Nick Foster2012-05-161-5/+1
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* b100: fix use of boost cstdint hereJosh Blum2012-05-161-1/+1
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* Throwing here causes difficulty initializing new USRPsJason Abele2012-05-141-1/+1
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* usrp1: ensure frontend specs are init'd to somethingJosh Blum2012-05-111-0/+2
| | | | | This helps the case of 4x DDC no DUC for example, that way at least something empty is set to the property.
* convert: fixed sc8 convert issue w/ undefined behaviourJosh Blum2012-05-081-16/+24
| | | | | | | Its important to use a signed cast when converting float to int. Then assign that signed int to an unsigned type of the same width. Its undefined behaviour when converting a negative float to an unsigned int.
* usrp2: fix ad9510 register map typosJosh Blum2012-04-241-13/+13
| | | | | | These register addresses should be in hex. Fortunately, they are not set in the code, so the typo did not break anything in UHD.
* usb: do not release recv buffer in wrapperJosh Blum2012-04-171-3/+2
| | | | | | | The actual recv buffer will be automatically released when dereferenced. By releasing this buffer early we allowed for a race condition: Subsequent wrapper buffers that shared the same actual buffer could get their memory filled by new recvd packets from the USB layer.
* recv: only inspect tsf on timestamp error checkJosh Blum2012-04-171-1/+1
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* convert: give SIMD conversions prio over tableJosh Blum2012-04-161-2/+2
| | | | | | | | given performance benchmarks involving the converter, when the driver is also doing other things sc8 conversions will still involve tables since no SIMD implementations exist yet
* dsp: clear register now overlaps with numchan register.Josh Blum2012-04-091-4/+2
| | | | This fixes the bug of unwanted clearing when setting format.
* usrp: fix set_clock_config typo for external and mimo clock refJosh Blum2012-04-061-2/+2
| | | | | | This is a typo in the set_clock_config implementation. However, the enum values are the same, so this would not cause a bug. Fixed although set_clock_config is a deprecated interface.
* usrp1: stop threads in deconstructorJosh Blum2012-03-293-4/+10
| | | | | | | | | | | | | | | Its important to stop the threads before we let the other smart point objects naturally deconstruct to avoid thread-based race conditions. The attempt to deconstruct the tree and soft time ctrl had a bug because the tree had references in subtrees within the dboard manager class. Rather than continue to fix this method and deconstruct the tree to free up soft time ctrl, it seems simpler to just stop the thread in soft time ctrl, and then let it naturally deconstruct later by ref count.
* dbsrx: limit the USRP1 + DBSRX GPIO clock rate to 4MHzJosh Blum2012-03-261-1/+8
| | | | | This fixes the lockup/clocking condition when the following hw combo is used: USRP1 r4.5 + DBSRX + another i2c board
* usrp2: possible fix for invalid broadcast repliesJosh Blum2012-03-261-3/+17
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* usrp: fix for rx_frontend_core_200 dc offsetJosh Blum2012-03-231-3/+4
| | | | | Mask off upper bits when setting a constant offset (I and Q regs). The sign bits (if negative) can flow off into the flags field.
* usrp: fix typo for user setting regJosh Blum2012-03-211-1/+1
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* uhd: add calls to query an ABI compat stringJosh Blum2012-03-211-1/+5
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* Disabling the SBX mixer and baseband amp causes griefJason Abele2012-03-161-1/+1
| | | | | Some ADA4927 / AD5380 combinations do not appreciate being disabled, so lets not disable them
* B100: enable_gpif(0) disables FIFO output clock on FX2. this prevents the ↵Nick Foster2012-03-161-2/+2
| | | | "stuffing zeroes" problem and improves transport reliability.
* usrp: fix from "rev iq correction"Josh Blum2012-03-163-6/+6
| | | | Must zero out the default IQ correction to have zero effect by default.
* n2x0: adjustment for phase delay over mimo cableJosh Blum2012-03-141-1/+1
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* uhd: make atlbase options for msvc buildJosh Blum2012-03-142-4/+16
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* uhd: rev iq correction numbers formatJosh Blum2012-03-143-47/+10
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* usrp: fix wildcard set for time/clock sourceJosh Blum2012-03-121-2/+2
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* uhd: added fullscale option stream argJosh Blum2012-03-112-0/+4
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* Make DBSRX* set default bandwidth based on codec rateJason Abele2012-03-112-2/+7
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* Fix RSSI measurementJason Abele2012-03-112-18/+4
| | | | | | Improve incorrect calculation in XCVR Remove RFX rssi sensor due to limited dynamic range giving strange results
* usrp1: fix for cordic init, cant do it that way on txJosh Blum2012-02-291-3/+0
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* uhd: fix sc16 to sc8 conversion tableJosh Blum2012-02-291-12/+12
| | | | | | | 1) this was registered as the sc8 to sc16 converter, probably messed that up as well 2) the cast to index was wrong, now unit test passes
* usrp2: device locking tweaksJosh Blum2012-02-291-9/+6
| | | | | | | 1) use bottom bit for force lock condition, that way we never check the time after proper shutdown 2) dont allow lock condition under fpga compat mismatch
* usrp: reset cordics on init after tick rate updateJosh Blum2012-02-284-0/+33
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* uhd: fixed some compile warnings for msvcJosh Blum2012-02-283-3/+3
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* cmake:Nicholas Corgan2012-02-281-1/+1
| | | | | | | More git info used for build info UHD version incorporates build info apt/yum repos use new version number New installer filename syntax
* uhd: fixed send pkt handler, vrt packet type was uninitializedJosh Blum2012-02-271-0/+1
| | | | | | | This fixes a bug where the sc8 engine will not interpret the packet as an IF data packet due to uninitialized bits. In that case the sc8 packet would pass through and be interpreted by the downstream as an sc16 packet.
* usrp1: fix to use the db connection type to determine DAC signJosh Blum2012-02-241-2/+10
| | | | | | | | Unlike the other products, usrp1 uses the DAC and not DSP to perform baseband frequency shifting in the hardware. Therefore this shifting occurs before I and Q swapping, and so, the sign of the frequency needs to be inverted on daughterboards which have inverted I and Q TX inputs.
* usrp1: fix advertised samples per packet in send streamerJosh Blum2012-02-211-1/+2
| | | | | Must subtract off the 511 for 512 modulus remainder commit. This bug was introduced by the conversion to streamer API.
* usrp2: some tweaks to the device locking logicJosh Blum2012-02-201-6/+9
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* usrp2: added retry logic to control packetsJosh Blum2012-02-201-2/+32
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* Merge branch 'next'Josh Blum2012-02-1747-344/+1112
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| * dsp rework: fix for vita occ trailer packingJosh Blum2012-02-171-1/+1
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| * dsp rework: added flusher to vita tx chain on clearJosh Blum2012-02-152-5/+8
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| * uhd: added async md user payload and common utilsJosh Blum2012-02-144-45/+88
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| * b100: use frame boundary to calculate frame sizeJosh Blum2012-02-142-4/+6
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| * b100: reset/reenumerate fx2 for bad endpoint stateJosh Blum2012-02-143-0/+31
| | | | | | | | | | | | Determine state of control endpoint, re-enumerate to put in a known state, rerun some initialization code.
| * b100: added transport flushes and moved around reset codeJosh Blum2012-02-143-13/+7
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| * dsp rework: minor fix sph, set has time spec for tsf onlyJosh Blum2012-02-141-2/+2
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| * uhd: inline time spec accessors for minor improvementJosh Blum2012-02-131-15/+10
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| * b100/usrp1: various tweaks for compiler warns and valgrindJosh Blum2012-02-094-9/+10
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