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* Merge branch 'maint'Martin Braun2015-01-204-10/+29
|\ | | | | | | | | Conflicts: host/include/uhd/types/direction.hpp
| * ad9361: bugfix for ad9361 gain value truncationJon Kiser2015-01-202-6/+10
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| * e300: Changed (max) serial number from 6 to 8.Moritz Fischer2015-01-202-4/+19
| | | | | | | | | | | | | | | | | | | | This works without hickup because we store the serial as a \0 terminated string. Note: We now also write the data version fields, as they might come in handy one day. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
* | Merge branch 'maint'Martin Braun2015-01-195-18/+81
|\| | | | | | | | | Conflicts: host/include/uhd/types/CMakeLists.txt
| * B200: Bug #656. Added FIR coeffs for filters with Fs/4 stop band.Ian Buckley2015-01-194-17/+69
| | | | | | | | AD9361 driver can now select coeffs for different interpolation ratios.
| * cmake: Added ENABLE_STATIC_LIBS optionMartin Braun2015-01-191-1/+12
| | | | | | | | | | | | | | - Allows building static libraries - For users calling find_package(UHD), provides extra options for building apps statically linking UHD. - Updated the init_usrp example to link UHD statically.
* | Merge branch 'maint'Martin Braun2015-01-162-31/+0
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| * e300: Removed duplicate FPGA loading functionMoritz Fischer2015-01-152-31/+0
| | | | | | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
* | Merge branch 'maint'Martin Braun2015-01-141-0/+13
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| * docs: Amended docs for conversion routinesMartin Braun2015-01-141-0/+13
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* | Merge branch 'maint'Martin Braun2015-01-143-1/+12
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| * b200: Added lo_locked sensorMartin Braun2015-01-143-1/+12
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* | Merge branch 'maint'Martin Braun2015-01-141-13/+60
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| * convert: Removed default-all-lines 12-bit packerMartin Braun2015-01-141-21/+6
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| * convert: Limit sc12 converter buffer overwriteTom Tsou2015-01-141-12/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch addresses issue #648 "B200: TX with SC12 format and MIMO". The observed MIMO header corruption was caused by overwriting the end of the packed 12-bit sample output buffer. The overwrite was due to the converter call always writing out 4 complex samples even if less than 4 samples were available. The extra samples would corrupt data with zero padding. Avoid the overwrite condition by only writing the minimum number of 32-bit lines necessary rather than the entire 12 byte struct. Samples 32-bit lines 1 1 2 2 3 3 4 3 Signed-off-by: Tom Tsou <tom@tsou.cc>
* | Added support for MinGW cross-compileNicholas Corgan2015-01-132-3/+3
| | | | | | | | | | | | * Added CMake toolchain file, compatible with different versions * No dependency on MinGW runtime, all statically linked * Misc coding tweaks to allow MinGW to compile
* | Merge branch 'maint'Martin Braun2015-01-139-5/+65
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| * e300: rssi sensor network supportJulian Arnold2015-01-124-2/+22
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| * b200: rssi sensorJulian Arnold2015-01-121-1/+3
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| * ad9361: rssi readoutJulian Arnold2015-01-124-2/+40
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* | Merge branch 'maint'Martin Braun2015-01-123-22/+20
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| * x300: Fix for BUG #655: X300: Device Time Not Getting Set from GPSDOmichael-west2015-01-121-8/+6
| | | | | | | | - Moved setting of tick rate before setting of PPS time
| * uhd: Fix for BUG #650: multi_usrp::get_usrp_tx/rx_info returning incorrect ↵michael-west2015-01-121-6/+6
| | | | | | | | dboard info for second mboard
| * convert: Fix sc12 unpack shiftingTom Tsou2015-01-121-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | Resolve issue #666 "B200: Rx signal distortion when using SC12". During 12-bit unpacking, OTW samples are shifted into the high order bits of the 16-bit intermediate values. The remaining 4-bits are not zeroed and contain bits from adjacent samples. Consequently, signal distortion becomes noticable with spurs and other random signal garbage when operating at low signal levels. Signed-off-by: Tom Tsou <tom@tsou.cc>
* | Merge branch 'maint'Martin Braun2015-01-081-2/+2
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| * e100: fixed typo in fpga_downloaderNicholas Corgan2015-01-071-2/+2
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* | revert unnecessary change to the SR_LEDSBrooks Prumo2015-01-051-1/+1
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* | x300: support new 120 MHz bandwidth versions of the NI-branded X310sBrooks2014-12-223-85/+103
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* | Adding support for NI VID + PIDs for USRP B2xx devices.Ben Hilburn2014-12-183-19/+76
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* | Merge branch 'maint'Martin Braun2014-12-164-4/+4
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| * e300,x300: Bumped FPGA compat numberAshish Chaudhari2014-12-162-2/+2
| | | | | | | | | | - X300: FPGA compat 9 - E300: FPGA compat 5
| * e300,x300: Moved LED register space as not to overlap w/ GPIOsAshish Chaudhari2014-12-162-2/+2
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* | Merge branch 'maint'Martin Braun2014-12-153-5/+6
|\| | | | | | | | | Conflicts: host/examples/rx_samples_to_file.cpp
| * nirio: Address linking issues on OSXMartin Braun2014-12-151-3/+4
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| * b200: Fix for PLL setting not being applied intermittentlyAshish Chaudhari2014-12-102-2/+2
| | | | | | | | - Made the methods in adf4001_ctrl virtual
* | Merge branch 'maint'Martin Braun2014-12-081-3/+4
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| * b200: select valid 10 MHz ref (update GPIO) *before* updating ADF4001 ↵Balint Seeber2014-12-081-3/+4
| | | | | | | | external ref selection
* | x300: Fixed minor issues in X300 clk codeAshish Chaudhari2014-12-051-2/+2
| | | | | | | | | | - Bugfix for #638 - get_ref_locked will check lock status one last time before giving up
* | x300: Made use of new CHDR packing routinesMartin Braun2014-12-031-43/+9
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* | transport: Made CHDR-related routines separate from VRTMartin Braun2014-12-032-0/+183
| | | | | | | | | | | | Our VRT routines have the option to switch, on the fly, between VRLP and CHDR. This adds new CHDR-specific (un-)packers, which can only work with CHDR.
* | Merge branch 'maint'Martin Braun2014-12-021-1/+10
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| * x300: Fixed FC window issue (was off by one)Martin Braun2014-12-021-1/+10
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* | multi_usrp: Handle auto_tick_rate properlyMartin Braun2014-11-211-0/+3
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* | uhd: replaced the `images_error` with a generic utility errorBen Hilburn2014-11-2114-97/+70
| | | | | | | | | | | | - Deleted images.*, moved functionality to paths.* - Applies for all devices that check FPGA or FW compat numbers - Adds generic utility search tool
* | Merge branch 'maint'Martin Braun2014-11-213-5/+19
|\| | | | | | | | | Conflicts: host/lib/usrp/b200/b200_impl.hpp
| * b200: serialized access to get_rx/tx_streamJulian Arnold2014-11-212-0/+6
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| * x300: Clarified FPGA compat error messageMartin Braun2014-11-211-5/+10
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| * x300: Cleaned up DAC ctrl and clock init logicAshish Chaudhari2014-11-066-201/+318
| | | | | | | | | | | | | | | | | | | | | | - DAC: Squashed configuration into 2 main operations: reset and reset_and_resync - DAC: Put in sleep mode during configuration - DAC: Synchronize only if streaming to more than one DAC - DAC: Use falling edge sync mode - DAC: Fixed power up/down settings - DAC: Frontend sync failure is fatal - Clocks: Refactored clock source change logic - Clocks: Cleaned up init and lock-check sequence
| * x300: Fixed typo in io_implMartin Braun2014-11-041-1/+1
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* | b200: Make the master clock rate auto-configurableMartin Braun2014-11-203-36/+210
| | | | | | | | | | | | | | | | | | | | When no master_clock_rate is defined, the B200 driver will now select a suitable clock rate automatically based on the selected sampling rate. The selected tick rate is a multiple of the LCM of tx and rx rates. Auto-setting is done every time a streamer is generated or the sampling rate is configured.
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